From patchwork Thu Nov 18 14:51:45 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean Pihet X-Patchwork-Id: 336601 X-Patchwork-Delegate: khilman@deeprootsystems.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oAIEqmk4014358 for ; Thu, 18 Nov 2010 14:52:48 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757087Ab0KROwr (ORCPT ); Thu, 18 Nov 2010 09:52:47 -0500 Received: from mail-wy0-f174.google.com ([74.125.82.174]:38000 "EHLO mail-wy0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756668Ab0KROwq (ORCPT ); Thu, 18 Nov 2010 09:52:46 -0500 Received: by wyb28 with SMTP id 28so3314898wyb.19 for ; Thu, 18 Nov 2010 06:52:45 -0800 (PST) Received: by 10.227.29.204 with SMTP id r12mr770186wbc.110.1290091955945; Thu, 18 Nov 2010 06:52:35 -0800 (PST) Received: from localhost.localdomain (86.141-245-81.adsl-dyn.isp.belgacom.be [81.245.141.86]) by mx.google.com with ESMTPS id ga16sm322583wbb.19.2010.11.18.06.52.33 (version=TLSv1/SSLv3 cipher=RC4-MD5); Thu, 18 Nov 2010 06:52:34 -0800 (PST) From: Jean Pihet To: linux-omap@vger.kernel.org Cc: Vishwanath BS , Kevin Hillman , Jean Pihet Subject: [PATCH 1/2] OMAP3 PM: move omap3 sleep to ddr Date: Thu, 18 Nov 2010 15:51:45 +0100 Message-Id: <1290091906-32539-2-git-send-email-j-pihet@ti.com> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1290091906-32539-1-git-send-email-j-pihet@ti.com> References: <1290091906-32539-1-git-send-email-j-pihet@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Thu, 18 Nov 2010 14:52:48 +0000 (UTC) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 75c0cd1..035ca47 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -65,8 +65,6 @@ struct power_state { static LIST_HEAD(pwrst_list); -static void (*_omap_sram_idle)(u32 *addr, int save_state); - static int (*_omap_save_secure_sram)(u32 *addr); static struct powerdomain *mpu_pwrdm, *neon_pwrdm; @@ -346,9 +344,6 @@ void omap_sram_idle(void) int core_prev_state, per_prev_state; u32 sdrc_pwr = 0; - if (!_omap_sram_idle) - return; - pwrdm_clear_all_prev_pwrst(mpu_pwrdm); pwrdm_clear_all_prev_pwrst(neon_pwrdm); pwrdm_clear_all_prev_pwrst(core_pwrdm); @@ -422,7 +417,7 @@ void omap_sram_idle(void) * get saved. The restore path then reads from this * location and restores them back. */ - _omap_sram_idle(omap3_arm_context, save_state); + omap34xx_cpu_suspend(omap3_arm_context, save_state); cpu_init(); /* Restore normal SDRC POWER settings */ @@ -972,8 +967,6 @@ static int __init clkdms_setup(struct clockdomain *clkdm, void *unused) void omap_push_sram_idle(void) { - _omap_sram_idle = omap_sram_push(omap34xx_cpu_suspend, - omap34xx_cpu_suspend_sz); if (omap_type() != OMAP2_DEVICE_TYPE_GP) _omap_save_secure_sram = omap_sram_push(save_secure_ram_context, save_secure_ram_context_sz);