@@ -422,6 +422,14 @@ void omap_sram_idle(void)
omap3_per_save_context();
}
+ /*
+ * We need to disable the autoidle bit from MPU INTC,
+ * otherwise INTC would get stall, and we would never
+ * come out of WFI. This is done here because
+ * save secure ram also does WFI.
+ */
+ omap3_intc_prepare_idle();
+
/* CORE */
if (core_next_state < PWRDM_POWER_ON) {
omap_uart_prepare_idle(0);
@@ -433,8 +441,6 @@ void omap_sram_idle(void)
}
}
- omap3_intc_prepare_idle();
-
/*
* On EMU/HS devices ROM code restores a SRDC value
* from scratchpad which has automatic self refresh on timeout