From patchwork Sat Dec 4 03:44:04 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: manjugk manjugk X-Patchwork-Id: 380101 X-Patchwork-Delegate: tony@atomide.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oB43i0ft025142 for ; Sat, 4 Dec 2010 03:44:25 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754498Ab0LDDoM (ORCPT ); Fri, 3 Dec 2010 22:44:12 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:33116 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754475Ab0LDDoL (ORCPT ); Fri, 3 Dec 2010 22:44:11 -0500 Received: from dlep33.itg.ti.com ([157.170.170.112]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id oB43i98m004110 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 3 Dec 2010 21:44:09 -0600 Received: from legion.dal.design.ti.com (localhost [127.0.0.1]) by dlep33.itg.ti.com (8.13.7/8.13.7) with ESMTP id oB43i7Ev013155; Fri, 3 Dec 2010 21:44:07 -0600 (CST) Received: from localhost (glpp-machine.apr.dhcp.ti.com [172.24.137.105]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id oB43i5f24448; Fri, 3 Dec 2010 21:44:05 -0600 (CST) From: "G, Manjunath Kondaiah" To: linux-omap@vger.kernel.org, tony@atomide.com Cc: linux-arm-kernel@lists.infradead.org, "G, Manjunath Kondaiah" , Benoit Cousson , Kevin Hilman , Santosh Shilimkar Subject: [PATCH v1 7/9] OMAP1: DMA: Implement in platform device model Date: Sat, 4 Dec 2010 09:14:04 +0530 Message-Id: <1291434246-30716-8-git-send-email-manjugk@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1291434246-30716-1-git-send-email-manjugk@ti.com> References: <1291434246-30716-1-git-send-email-manjugk@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Sat, 04 Dec 2010 03:44:25 +0000 (UTC) diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c new file mode 100644 index 0000000..b56ee21 --- /dev/null +++ b/arch/arm/mach-omap1/dma.c @@ -0,0 +1,179 @@ +/* + * OMAP1/OMAP7xx - specific DMA driver + * + * Copyright (C) 2003 - 2008 Nokia Corporation + * Author: Juha Yrjölä + * DMA channel linking for 1610 by Samuel Ortiz + * Graphics DMA and LCD DMA graphics tranformations + * by Imre Deak + * OMAP2/3 support Copyright (C) 2004-2007 Texas Instruments, Inc. + * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc. + * + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * Converted DMA library into platform driver + * - G, Manjunath Kondaiah + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#define OMAP1_DMA_BASE (0xfffed800) + +static struct resource res[] __initdata = { + [0] = { + .start = OMAP1_DMA_BASE, + .end = OMAP1_DMA_BASE + SZ_2K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .name = "0", + .start = INT_DMA_CH0_6, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .name = "1", + .start = INT_DMA_CH1_7, + .flags = IORESOURCE_IRQ, + }, + [3] = { + .name = "2", + .start = INT_DMA_CH2_8, + .flags = IORESOURCE_IRQ, + }, + [4] = { + .name = "3", + .start = INT_DMA_CH3, + .flags = IORESOURCE_IRQ, + }, + [5] = { + .name = "4", + .start = INT_DMA_CH4, + .flags = IORESOURCE_IRQ, + }, + [6] = { + .name = "5", + .start = INT_DMA_CH5, + .flags = IORESOURCE_IRQ, + }, + [7] = { + .name = "6", + .start = INT_DMA_LCD, + .flags = IORESOURCE_IRQ, + }, + /* irq's for omap16xx and omap7xx */ + [8] = { + .name = "7", + .start = 53 + IH2_BASE, + .flags = IORESOURCE_IRQ, + }, + [9] = { + .name = "8", + .start = 54 + IH2_BASE, + .flags = IORESOURCE_IRQ, + }, + [10] = { + .name = "9", + .start = 55 + IH2_BASE, + .flags = IORESOURCE_IRQ, + }, + [11] = { + .name = "10", + .start = 56 + IH2_BASE, + .flags = IORESOURCE_IRQ, + }, + [12] = { + .name = "11", + .start = 57 + IH2_BASE, + .flags = IORESOURCE_IRQ, + }, + [13] = { + .name = "12", + .start = 58 + IH2_BASE, + .flags = IORESOURCE_IRQ, + }, + [14] = { + .name = "13", + .start = 59 + IH2_BASE, + .flags = IORESOURCE_IRQ, + }, + [15] = { + .name = "14", + .start = 60 + IH2_BASE, + .flags = IORESOURCE_IRQ, + }, + [16] = { + .name = "15", + .start = 61 + IH2_BASE, + .flags = IORESOURCE_IRQ, + }, + [17] = { + .name = "16", + .start = 62 + IH2_BASE, + .flags = IORESOURCE_IRQ, + }, +}; + +static int __init omap1_system_dma_init(void) +{ + struct omap_system_dma_plat_info *p; + struct platform_device *pdev; + int ret; + + pdev = platform_device_alloc("omap_dma_system", 0); + if (!pdev) { + pr_err("%s: Unable to device alloc for dma\n", + __func__); + return -ENOMEM; + } + + ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res)); + if (ret) { + dev_err(&pdev->dev, "%s: Unable to add resources for %s%d\n", + __func__, pdev->name, pdev->id); + goto exit_device_del; + } + + p = kzalloc(sizeof(struct omap_system_dma_plat_info), GFP_KERNEL); + if (!p) { + dev_err(&pdev->dev, "%s: Unable to allocate 'p' for %s\n", + __func__, pdev->name); + ret = -ENOMEM; + goto exit_device_put; + } + + ret = platform_device_add_data(pdev, p, sizeof(*p)); + if (ret) { + dev_err(&pdev->dev, "%s: Unable to add resources for %s%d\n", + __func__, pdev->name, pdev->id); + goto exit_device_put; + } + + ret = platform_device_add(pdev); + if (ret) { + dev_err(&pdev->dev, "%s: Unable to add resources for %s%d\n", + __func__, pdev->name, pdev->id); + goto exit_device_put; + } + + return ret; + +exit_device_put: + platform_device_put(pdev); +exit_device_del: + platform_device_del(pdev); + + return ret; +} +arch_initcall(omap1_system_dma_init);