@@ -823,6 +823,7 @@ config ARCH_U300
config ARCH_U8500
bool "ST-Ericsson U8500 Series"
select CPU_V7
+ select ARCH_HAS_COMMON_CORES_CLOCK
select ARM_AMBA
select GENERIC_CLOCKEVENTS
select CLKDEV_LOOKUP
@@ -1418,6 +1419,10 @@ config ARCH_SPARSEMEM_DEFAULT
config ARCH_SELECT_MEMORY_MODEL
def_bool ARCH_SPARSEMEM_ENABLE
+config ARCH_HAS_COMMON_CORES_CLOCK
+ bool
+ depends on SMP
+
config HIGHMEM
bool "High Memory Support (EXPERIMENTAL)"
depends on MMU && EXPERIMENTAL
@@ -270,6 +270,20 @@ static void __cpuinit smp_store_cpu_info(unsigned int cpuid)
}
/*
+ * Skip the secondary calibration on architectures sharing clock
+ * with primary cpu. Archs can select ARCH_HAS_COMMON_CORES_CLOCK
+ * for this.
+ */
+static inline int skip_secondary_calibrate(void)
+{
+#ifdef CONFIG_ARCH_HAS_COMMON_CORES_CLOCK
+ return true;
+#else
+ return false;
+#endif
+}
+
+/*
* This is the secondary CPU boot entry. We're using this CPUs
* idle thread stack, but a set of temporary page tables.
*/
@@ -312,7 +326,8 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
*/
percpu_timer_setup();
- calibrate_delay();
+ if (!skip_secondary_calibrate())
+ calibrate_delay();
smp_store_cpu_info(cpu);
@@ -332,14 +347,19 @@ void __init smp_cpus_done(unsigned int max_cpus)
int cpu;
unsigned long bogosum = 0;
- for_each_online_cpu(cpu)
- bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
+ if (!skip_secondary_calibrate()) {
+ for_each_online_cpu(cpu)
+ bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
- printk(KERN_INFO "SMP: Total of %d processors activated "
- "(%lu.%02lu BogoMIPS).\n",
- num_online_cpus(),
- bogosum / (500000/HZ),
- (bogosum / (5000/HZ)) % 100);
+ printk(KERN_INFO "SMP: Total of %d processors activated "
+ "(%lu.%02lu BogoMIPS).\n",
+ num_online_cpus(),
+ bogosum / (500000/HZ),
+ (bogosum / (5000/HZ)) % 100);
+ } else {
+ printk(KERN_INFO "SMP: Total of %d processors activated.\n",
+ num_online_cpus());
+ }
}
void __init smp_prepare_boot_cpu(void)
@@ -43,6 +43,7 @@ config ARCH_OMAP4
default y
depends on ARCH_OMAP2PLUS
select CPU_V7
+ select ARCH_HAS_COMMON_CORES_CLOCK
select ARM_GIC
select PL310_ERRATA_588369
select ARM_ERRATA_720789