@@ -65,6 +65,9 @@ u32 omap3_dpll_autoidle_read(struct clk *clk);
int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate);
int omap3_noncore_dpll_enable(struct clk *clk);
void omap3_noncore_dpll_disable(struct clk *clk);
+int omap4_dpllmx_gatectrl_read(struct clk *clk);
+void omap4_dpllmx_allow_gatectrl(struct clk *clk);
+void omap4_dpllmx_deny_gatectrl(struct clk *clk);
#ifdef CONFIG_OMAP_RESET_CLOCKS
void omap2_clk_disable_unused(struct clk *clk);
@@ -34,11 +34,14 @@
#include "clock.h"
#include "cm2xxx_3xxx.h"
#include "cm-regbits-34xx.h"
+#include "cm-regbits-44xx.h"
/* CM_AUTOIDLE_PLL*.AUTO_* bit values */
#define DPLL_AUTOIDLE_DISABLE 0x0
#define DPLL_AUTOIDLE_LOW_POWER_STOP 0x1
+#define DPLL_GATECTRL_DISABLE 0x0
+
#define MAX_DPLL_WAIT_TRIES 1000000
/* Private functions */
@@ -612,3 +615,43 @@ unsigned long omap3_clkoutx2_recalc(struct clk *clk)
rate = clk->parent->rate * 2;
return rate;
}
+
+int omap4_dpllmx_gatectrl_read(struct clk *clk)
+{
+ u32 v;
+
+ if (!clk || !(clk->flags & CLOCK_MX_IDLE_CONTROL) || !clk->clksel_reg)
+ return -EINVAL;
+
+ v = __raw_readl(clk->clksel_reg);
+ v &= OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK;
+ v >>= __ffs(OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK);
+
+ return v;
+}
+
+void omap4_dpllmx_allow_gatectrl(struct clk *clk)
+{
+ u32 v;
+
+ if (!clk || !(clk->flags & CLOCK_MX_IDLE_CONTROL) || !clk->clksel_reg)
+ return;
+
+ v = __raw_readl(clk->clksel_reg);
+ v &= ~OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK;
+ v |= __ffs(OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK);
+ __raw_writel(v, clk->clksel_reg);
+}
+
+void omap4_dpllmx_deny_gatectrl(struct clk *clk)
+{
+ u32 v;
+
+ if (!clk || !(clk->flags & CLOCK_MX_IDLE_CONTROL) || !clk->clksel_reg)
+ return;
+
+ v = __raw_readl(clk->clksel_reg);
+ v &= ~OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK;
+ v |= DPLL_GATECTRL_DISABLE << __ffs(OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK);
+ __raw_writel(v, clk->clksel_reg);
+}
@@ -177,6 +177,7 @@ struct dpll_data {
#define CLOCK_NO_IDLE_PARENT (1 << 2)
#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
#define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
+#define CLOCK_MX_IDLE_CONTROL (1 << 5)
/**
* struct clk - OMAP struct clk