From patchwork Thu Feb 10 14:07:59 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kalliguddi, Hema" X-Patchwork-Id: 546441 X-Patchwork-Delegate: me@felipebalbi.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p1AE8Wj3010700 for ; Thu, 10 Feb 2011 14:08:44 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756246Ab1BJOIZ (ORCPT ); Thu, 10 Feb 2011 09:08:25 -0500 Received: from arroyo.ext.ti.com ([192.94.94.40]:41040 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756232Ab1BJOIY (ORCPT ); Thu, 10 Feb 2011 09:08:24 -0500 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id p1AE8II5030739 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 10 Feb 2011 08:08:20 -0600 Received: from localhost.localdomain (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p1AE83pR013309; Thu, 10 Feb 2011 19:38:16 +0530 (IST) From: Hema HK To: linux-omap@vger.kernel.org Cc: linux-usb@vger.kernel.org, Hema HK , "Cousson, Benoit" , Felipe Balbi , Tony Lindgren , Kevin Hilman , Paul Walmsley Subject: [PATCH 3/5 v6] OMAP4430: hwmod data: Adding USBOTG Date: Thu, 10 Feb 2011 19:37:59 +0530 Message-Id: <1297346881-13438-4-git-send-email-hemahk@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1297346881-13438-1-git-send-email-hemahk@ti.com> References: <1297346881-13438-1-git-send-email-hemahk@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 10 Feb 2011 14:08:44 +0000 (UTC) Index: linux-2.6/arch/arm/mach-omap2/omap_hwmod_44xx_data.c =================================================================== --- linux-2.6.orig/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ linux-2.6/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -55,6 +55,7 @@ static struct omap_hwmod omap44xx_l4_per static struct omap_hwmod omap44xx_l4_wkup_hwmod; static struct omap_hwmod omap44xx_mpu_hwmod; static struct omap_hwmod omap44xx_mpu_private_hwmod; +static struct omap_hwmod omap44xx_usb_otg_hs_hwmod; /* * Interconnects omap_hwmod structures @@ -286,12 +287,21 @@ static struct omap_hwmod_ocp_if omap44xx .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* usb_otg_hs -> l3_main_2 */ +static struct omap_hwmod_ocp_if omap44xx_usb_otg_hs__l3_main_2 = { + .master = &omap44xx_usb_otg_hs_hwmod, + .slave = &omap44xx_l3_main_2_hwmod, + .clk = "l3_div_ck", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + /* l3_main_2 slave ports */ static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = { &omap44xx_dma_system__l3_main_2, &omap44xx_iva__l3_main_2, &omap44xx_l3_main_1__l3_main_2, &omap44xx_l4_cfg__l3_main_2, + &omap44xx_usb_otg_hs__l3_main_2, }; static struct omap_hwmod omap44xx_l3_main_2_hwmod = { @@ -2001,6 +2011,87 @@ static struct omap_hwmod omap44xx_wd_tim .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; +/* + * 'usb_otg_hs' class + * high-speed on-the-go universal serial bus (usb_otg_hs) controller + */ + +static struct omap_hwmod_class_sysconfig omap44xx_usb_otg_hs_sysc = { + .rev_offs = 0x0400, + .sysc_offs = 0x0404, + .syss_offs = 0x0408, + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE| + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | + SYSC_HAS_AUTOIDLE), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class omap44xx_usb_otg_hs_hwmod_class = { + .name = "usb_otg_hs", + .sysc = &omap44xx_usb_otg_hs_sysc, +}; + +/* usb_otg_hs */ +static struct omap_hwmod_irq_info omap44xx_usb_otg_hs_irqs[] = { + { .name = "mc", .irq = 92 + OMAP44XX_IRQ_GIC_START }, + { .name = "dma", .irq = 93 + OMAP44XX_IRQ_GIC_START }, +}; + +/* usb_otg_hs master ports */ +static struct omap_hwmod_ocp_if *omap44xx_usb_otg_hs_masters[] = { + &omap44xx_usb_otg_hs__l3_main_2, +}; + +static struct omap_hwmod_addr_space omap44xx_usb_otg_hs_addrs[] = { + { + .pa_start = OMAP44XX_HSUSB_OTG_BASE, + .pa_end = OMAP44XX_HSUSB_OTG_BASE + SZ_4K - 1, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_cfg -> usb_otg_hs */ +static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_otg_hs = { + .master = &omap44xx_l4_cfg_hwmod, + .slave = &omap44xx_usb_otg_hs_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_usb_otg_hs_addrs, + .addr_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_addrs), + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* usb_otg_hs slave ports */ +static struct omap_hwmod_ocp_if *omap44xx_usb_otg_hs_slaves[] = { + &omap44xx_l4_cfg__usb_otg_hs, +}; + +static struct omap_hwmod_opt_clk usb_otg_hs_opt_clks[] = { + { .role = "xclk", .clk = "otg_60m_gfclk_ck" }, +}; + +static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { + .name = "usb_otg_hs", + .class = &omap44xx_usb_otg_hs_hwmod_class, + .mpu_irqs = omap44xx_usb_otg_hs_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_irqs), + .main_clk = "usb_otg_hs_ick", + .prcm = { + .omap4 = { + .clkctrl_reg = OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL, + }, + }, + .opt_clks = usb_otg_hs_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks), + .slaves = omap44xx_usb_otg_hs_slaves, + .slaves_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_slaves), + .masters = omap44xx_usb_otg_hs_masters, + .masters_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_masters), + .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), +}; + static __initdata struct omap_hwmod *omap44xx_hwmods[] = { /* dmm class */ @@ -2068,6 +2159,8 @@ static __initdata struct omap_hwmod *oma &omap44xx_wd_timer2_hwmod, &omap44xx_wd_timer3_hwmod, + /* hsusb otg class */ + &omap44xx_usb_otg_hs_hwmod, NULL, };