From patchwork Tue Mar 1 08:42:13 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Semwal X-Patchwork-Id: 598461 X-Patchwork-Delegate: tomi.valkeinen@nokia.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p218gZKe021048 for ; Tue, 1 Mar 2011 08:42:35 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755893Ab1CAIme (ORCPT ); Tue, 1 Mar 2011 03:42:34 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:38462 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755844Ab1CAImd (ORCPT ); Tue, 1 Mar 2011 03:42:33 -0500 Received: from dlep33.itg.ti.com ([157.170.170.112]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id p218gXBs004117 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Tue, 1 Mar 2011 02:42:33 -0600 Received: from legion.dal.design.ti.com (localhost [127.0.0.1]) by dlep33.itg.ti.com (8.13.7/8.13.7) with ESMTP id p218gUYH014995; Tue, 1 Mar 2011 02:42:30 -0600 (CST) Received: from localhost (a0876505ubnlt.apr.dhcp.ti.com [172.24.136.81]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id p218gSf05257; Tue, 1 Mar 2011 02:42:28 -0600 (CST) From: Sumit Semwal To: tomi.valkeinen@ti.com, linux-omap@vger.kernel.org Cc: Sumit Semwal , Senthilvadivu Guruswamy Subject: [Patch v3 1/2] OMAP2PLUS:DSS2: add opt_clock_available in pdata Date: Tue, 1 Mar 2011 14:12:13 +0530 Message-Id: <1298968934-22697-2-git-send-email-sumit.semwal@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1298968934-22697-1-git-send-email-sumit.semwal@ti.com> References: <1298968934-22697-1-git-send-email-sumit.semwal@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Tue, 01 Mar 2011 08:42:49 +0000 (UTC) diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 5ab6a74..6b1efc5 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -42,6 +42,20 @@ static struct omap_device_pm_latency omap_dss_latency[] = { }, }; +/* oh_core is used for getting opt-clocks */ +static struct omap_hwmod *oh_core; + +static bool opt_clock_available(const char *clk_role) +{ + int i; + + for (i = 0; i < oh_core->opt_clks_cnt; i++) { + if (!strcmp(oh_core->opt_clks[i].role, clk_role)) + return true; + } + return false; +} + int __init omap_display_init(struct omap_dss_board_info *board_data) { int r = 0; @@ -73,9 +87,16 @@ int __init omap_display_init(struct omap_dss_board_info *board_data) oh_count = ARRAY_SIZE(oh_name) - 2; /* last 2 hwmod dev in oh_name are not available for omap3 */ + /* opt_clks are always associated with dss hwmod */ + oh_core = omap_hwmod_lookup("dss_core"); + if (!oh_core) { + pr_err("Could not look up dss_core.\n"); + return -ENODEV; + } pdata.board_data = board_data; pdata.board_data->get_last_off_on_transaction_id = NULL; + pdata.opt_clock_available = opt_clock_available; for (i = 0; i < oh_count; i++) { oh = omap_hwmod_lookup(oh_name[i]); @@ -83,6 +104,7 @@ int __init omap_display_init(struct omap_dss_board_info *board_data) pr_err("Could not look up %s\n", oh_name[i]); return -ENODEV; } + od = omap_device_build(dev_name[i], -1, oh, &pdata, sizeof(struct omap_display_platform_data), omap_dss_latency, diff --git a/arch/arm/plat-omap/include/plat/display.h b/arch/arm/plat-omap/include/plat/display.h index 2fb057e..4101bcd 100644 --- a/arch/arm/plat-omap/include/plat/display.h +++ b/arch/arm/plat-omap/include/plat/display.h @@ -240,6 +240,8 @@ static inline int omap_display_init(struct omap_dss_board_info *board_data) struct omap_display_platform_data { struct omap_dss_board_info *board_data; /* TODO: Additional members to be added when PM is considered */ + + bool (*opt_clock_available)(const char *clk_role); }; struct omap_video_timings {