OMAP4 DSS clock setup

Commit Message

Tomi Valkeinen March 30, 2011, 12:58 p.m. UTC

None

Comments

Paul Walmsley April 2, 2011, 2:12 a.m. UTC | #1

Hi Tomi, Benoît, et al,

On Wed, 30 Mar 2011, Tomi Valkeinen wrote:

> Currently we have these aliases for OMAP4:
> 
> "dss_clk" -> dss_dss_clk
> "fck" -> dss_fck
> "ick" -> dummy_ck
>
> If that would be changed to:
>
> "fck" -> dss_dss_clk
> "ick -> dss_fck
>
> The driver would work the same way for all OMAPs.

This looks reasonable to me, and seems to match the TRM's Figure 10-4 "DSS 
Clock Tree".

The current OMAP4 clock data name "dss_fck" is just kind of a fake name 
for that clock in the OMAP4 context.

> Anyway. To get things working for rc2 (DSS currently crashes due to not
> enabling dss_clk) we need to either:
> 1) Change the clock aliases as above
> 2) Add something like Sumit's patch (attached) to handle dss_clk. While
> the patch is not that complex, it feels rather hacky.

Yeah, that patch looks like a hack to me, especially something like 
this:

+       if (pdata->opt_clock_available("dss_clk")) {

Based on the E-mail thread so far, I'd say that changing the clock aliases 
is the way to go for right now.  The clock aliases are not hardware data; 
they just control how the clock hardware is mapped to the drivers.

Of course, at some point soon, those clock aliases are going to go away.  
But hopefully you all will have converted the driver over to PM runtime at 
that point.

Once that happens, there's another problem: omap_hwmod_enable() is defined 
that the hardware registers should be accessible by the MPU after it 
completes.  So by that definition, the hwmod code should be 
enabling/disabling that dss_clk clock too when it enables/idles/shuts down 
the hwmod.  Probably we'd need to mark that struct omap_hwmod_opt_clk with 
some flag.  Then we'd need some kind of way for the DSS to tell the hwmod 
code whether it is or isn't reliant on the PRCM-provided functional clock 
for its internal functional clock.  Maybe something like 
omap_hwmod_{release,require}_system_fclk()?


- Paul

Patch

From 0722361a0921296c980cb9011dad42f56c929007 Mon Sep 17 00:00:00 2001
From: Sumit Semwal <[e-mail]>
Date: Tue, 1 Mar 2011 14:23:09 +0530
Subject: [PATCH] OMAP4:DSS2: add dss_dss_clk.

dss_dss_clk is a new clock needed in OMAP4 as an opt-clock.
Adding the same in dss clock handling.

Signed-off-by: Sumit Semwal <[e-mail]>
---
 drivers/video/omap2/dss/dss.c |   33 ++++++++++++++++++++++++++++++---
 1 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c
index 3d0277d..6c1a090 100644
--- a/drivers/video/omap2/dss/dss.c
+++ b/drivers/video/omap2/dss/dss.c
@@ -67,6 +67,7 @@  static struct {
 	struct clk	*dss_sys_clk;
 	struct clk	*dss_tv_fck;
 	struct clk	*dss_video_fck;
+	struct clk	*dss_dss_clk;
 	unsigned	num_clks_enabled;
 
 	unsigned long	cache_req_pck;
@@ -706,6 +707,7 @@  static int dss_get_clocks(void)
 	dss.dss_sys_clk = NULL;
 	dss.dss_tv_fck = NULL;
 	dss.dss_video_fck = NULL;
+	dss.dss_dss_clk	= NULL;
 
 	r = dss_get_clock(&dss.dss_ick, "ick");
 	if (r)
@@ -738,6 +740,12 @@  static int dss_get_clocks(void)
 			goto err;
 	}
 
+	if (pdata->opt_clock_available("dss_clk")) {
+		r = dss_get_clock(&dss.dss_dss_clk, "dss_clk");
+		if (r)
+			goto err;
+	}
+
 	return 0;
 
 err:
@@ -751,7 +759,8 @@  err:
 		clk_put(dss.dss_tv_fck);
 	if (dss.dss_video_fck)
 		clk_put(dss.dss_video_fck);
-
+	if (dss.dss_dss_clk)
+		clk_put(dss.dss_dss_clk);
 	return r;
 }
 
@@ -763,6 +772,8 @@  static void dss_put_clocks(void)
 		clk_put(dss.dss_tv_fck);
 	if (dss.dss_sys_clk)
 		clk_put(dss.dss_sys_clk);
+	if (dss.dss_dss_clk)
+		clk_put(dss.dss_dss_clk);
 	clk_put(dss.dss_fck);
 	clk_put(dss.dss_ick);
 }
@@ -810,8 +821,16 @@  static void dss_clk_enable_no_ctx(enum dss_clock clks)
 
 	if (clks & DSS_CLK_ICK)
 		clk_enable(dss.dss_ick);
-	if (clks & DSS_CLK_FCK)
+	/*
+	 * XXX: tie dss_dss_clk to FCK - this will change with following
+	 * pm_runtime patches. Needed for OMAP4 boot up due to stricter
+	 * clock cutting in pm framework post 2.6.38-rc5.
+	 */
+	if (clks & DSS_CLK_FCK) {
 		clk_enable(dss.dss_fck);
+		if (dss.dss_dss_clk)
+			clk_enable(dss.dss_dss_clk);
+	}
 	if ((clks & DSS_CLK_SYSCK) && dss.dss_sys_clk)
 		clk_enable(dss.dss_sys_clk);
 	if ((clks & DSS_CLK_TVFCK) && dss.dss_tv_fck)
@@ -838,8 +857,16 @@  static void dss_clk_disable_no_ctx(enum dss_clock clks)
 
 	if (clks & DSS_CLK_ICK)
 		clk_disable(dss.dss_ick);
-	if (clks & DSS_CLK_FCK)
+        /*
+         * XXX: tie dss_dss_clk to FCK - this will change with following
+         * pm_runtime patches. Needed for OMAP4 boot up due to stricter
+         * clock cutting in pm framework post 2.6.38-rc5.
+         */
+	if (clks & DSS_CLK_FCK) {
 		clk_disable(dss.dss_fck);
+		if (dss.dss_dss_clk)
+			clk_disable(dss.dss_dss_clk);
+	}
 	if ((clks & DSS_CLK_SYSCK) && dss.dss_sys_clk)
 		clk_disable(dss.dss_sys_clk);
 	if ((clks & DSS_CLK_TVFCK) && dss.dss_tv_fck)
-- 
1.7.1