From patchwork Wed Mar 30 12:58:50 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 674062 X-Patchwork-Delegate: tomi.valkeinen@nokia.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p2UCwxIK002138 for ; Wed, 30 Mar 2011 12:58:59 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754883Ab1C3M66 (ORCPT ); Wed, 30 Mar 2011 08:58:58 -0400 Received: from na3sys009aog104.obsmtp.com ([74.125.149.73]:36563 "EHLO na3sys009aog104.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754785Ab1C3M65 (ORCPT ); Wed, 30 Mar 2011 08:58:57 -0400 Received: from source ([209.85.213.178]) (using TLSv1) by na3sys009aob104.postini.com ([74.125.148.12]) with SMTP ID DSNKTZMpEIkP2Zre0z/jiBM3A9makWSZTs8h@postini.com; Wed, 30 Mar 2011 05:58:57 PDT Received: by yxa15 with SMTP id 15so578122yxa.23 for ; Wed, 30 Mar 2011 05:58:55 -0700 (PDT) Received: by 10.90.9.34 with SMTP id 34mr347414agi.153.1301489935498; Wed, 30 Mar 2011 05:58:55 -0700 (PDT) Received: from [172.24.88.11] (dragon.ti.com [192.94.94.33]) by mx.google.com with ESMTPS id n8sm54923anc.35.2011.03.30.05.58.52 (version=SSLv3 cipher=OTHER); Wed, 30 Mar 2011 05:58:55 -0700 (PDT) Subject: Re: OMAP4 DSS clock setup From: Tomi Valkeinen To: "Cousson, Benoit" Cc: Paul Walmsley , "Semwal, Sumit" , "Taneja, Archit" , linux-omap In-Reply-To: <4D931E21.8090305@ti.com> References: <1301467733.2333.83.camel@deskari> <4D92F899.7010606@ti.com> <1301483027.4045.16.camel@deskari> <4D931E21.8090305@ti.com> Date: Wed, 30 Mar 2011 15:58:50 +0300 Message-ID: <1301489930.15095.51.camel@deskari> Mime-Version: 1.0 X-Mailer: Evolution 2.30.3 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Wed, 30 Mar 2011 12:58:59 +0000 (UTC) From 0722361a0921296c980cb9011dad42f56c929007 Mon Sep 17 00:00:00 2001 From: Sumit Semwal Date: Tue, 1 Mar 2011 14:23:09 +0530 Subject: [PATCH] OMAP4:DSS2: add dss_dss_clk. dss_dss_clk is a new clock needed in OMAP4 as an opt-clock. Adding the same in dss clock handling. Signed-off-by: Sumit Semwal --- drivers/video/omap2/dss/dss.c | 33 ++++++++++++++++++++++++++++++--- 1 files changed, 30 insertions(+), 3 deletions(-) diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 3d0277d..6c1a090 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -67,6 +67,7 @@ static struct { struct clk *dss_sys_clk; struct clk *dss_tv_fck; struct clk *dss_video_fck; + struct clk *dss_dss_clk; unsigned num_clks_enabled; unsigned long cache_req_pck; @@ -706,6 +707,7 @@ static int dss_get_clocks(void) dss.dss_sys_clk = NULL; dss.dss_tv_fck = NULL; dss.dss_video_fck = NULL; + dss.dss_dss_clk = NULL; r = dss_get_clock(&dss.dss_ick, "ick"); if (r) @@ -738,6 +740,12 @@ static int dss_get_clocks(void) goto err; } + if (pdata->opt_clock_available("dss_clk")) { + r = dss_get_clock(&dss.dss_dss_clk, "dss_clk"); + if (r) + goto err; + } + return 0; err: @@ -751,7 +759,8 @@ err: clk_put(dss.dss_tv_fck); if (dss.dss_video_fck) clk_put(dss.dss_video_fck); - + if (dss.dss_dss_clk) + clk_put(dss.dss_dss_clk); return r; } @@ -763,6 +772,8 @@ static void dss_put_clocks(void) clk_put(dss.dss_tv_fck); if (dss.dss_sys_clk) clk_put(dss.dss_sys_clk); + if (dss.dss_dss_clk) + clk_put(dss.dss_dss_clk); clk_put(dss.dss_fck); clk_put(dss.dss_ick); } @@ -810,8 +821,16 @@ static void dss_clk_enable_no_ctx(enum dss_clock clks) if (clks & DSS_CLK_ICK) clk_enable(dss.dss_ick); - if (clks & DSS_CLK_FCK) + /* + * XXX: tie dss_dss_clk to FCK - this will change with following + * pm_runtime patches. Needed for OMAP4 boot up due to stricter + * clock cutting in pm framework post 2.6.38-rc5. + */ + if (clks & DSS_CLK_FCK) { clk_enable(dss.dss_fck); + if (dss.dss_dss_clk) + clk_enable(dss.dss_dss_clk); + } if ((clks & DSS_CLK_SYSCK) && dss.dss_sys_clk) clk_enable(dss.dss_sys_clk); if ((clks & DSS_CLK_TVFCK) && dss.dss_tv_fck) @@ -838,8 +857,16 @@ static void dss_clk_disable_no_ctx(enum dss_clock clks) if (clks & DSS_CLK_ICK) clk_disable(dss.dss_ick); - if (clks & DSS_CLK_FCK) + /* + * XXX: tie dss_dss_clk to FCK - this will change with following + * pm_runtime patches. Needed for OMAP4 boot up due to stricter + * clock cutting in pm framework post 2.6.38-rc5. + */ + if (clks & DSS_CLK_FCK) { clk_disable(dss.dss_fck); + if (dss.dss_dss_clk) + clk_disable(dss.dss_dss_clk); + } if ((clks & DSS_CLK_SYSCK) && dss.dss_sys_clk) clk_disable(dss.dss_sys_clk); if ((clks & DSS_CLK_TVFCK) && dss.dss_tv_fck) -- 1.7.1