From patchwork Wed Apr 20 09:25:09 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Gulati, Shweta" X-Patchwork-Id: 721281 X-Patchwork-Delegate: paul@pwsan.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p3K9PWpd028036 for ; Wed, 20 Apr 2011 09:25:32 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753693Ab1DTJZ2 (ORCPT ); Wed, 20 Apr 2011 05:25:28 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:40720 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753634Ab1DTJZY (ORCPT ); Wed, 20 Apr 2011 05:25:24 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id p3K9PHwD010407 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 20 Apr 2011 04:25:19 -0500 Received: from dbde70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p3K9PEsJ005422; Wed, 20 Apr 2011 14:55:15 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 8.3.106.1; Wed, 20 Apr 2011 14:54:57 +0530 Received: from localhost.localdomain (omapldc12.india.ti.com [172.24.136.100]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p3K9PBNK007196; Wed, 20 Apr 2011 14:55:12 +0530 (IST) From: Shweta Gulati To: CC: , "Gulati, Shweta" , Rajendra Nayak , Paul Wamsley Subject: [PATCH] OMAP: Added recalculation of clock rate in 'clk_set_rate' Date: Wed, 20 Apr 2011 14:55:09 +0530 Message-ID: <1303291509-2305-1-git-send-email-shweta.gulati@ti.com> X-Mailer: git-send-email 1.7.0.4 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Wed, 20 Apr 2011 09:25:32 +0000 (UTC) From: Gulati, Shweta Core Clk Tree shows incorrect Clk rates at OPP50, as in commit e07f469d284ca3d1f5dcf5438c22982be98bc071 calling of 'recalc' in API clk_set_rate is unintentionally removed, because of which clock's tree rates get goofed up when DVFS happens. This Patch adds recalc API back. Tested on OMAP3630 SDP Board. Signed-off-by: Shweta Gulati Cc: Rajendra Nayak Cc: Paul Wamsley --- arch/arm/plat-omap/clock.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index c9122dd..5a0d06b 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c @@ -130,8 +130,11 @@ int clk_set_rate(struct clk *clk, unsigned long rate) spin_lock_irqsave(&clockfw_lock, flags); ret = arch_clock->clk_set_rate(clk, rate); - if (ret == 0) + if (ret == 0) { + if (clk->recalc) + clk->rate = clk->recalc(clk); propagate_rate(clk); + } spin_unlock_irqrestore(&clockfw_lock, flags); return ret;