From patchwork Fri May 20 15:14:56 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 804032 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p4KFFp78021519 for ; Fri, 20 May 2011 15:15:51 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933831Ab1ETPPt (ORCPT ); Fri, 20 May 2011 11:15:49 -0400 Received: from na3sys009aog116.obsmtp.com ([74.125.149.240]:52738 "EHLO na3sys009aog116.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933776Ab1ETPPr (ORCPT ); Fri, 20 May 2011 11:15:47 -0400 Received: from mail-wy0-f174.google.com ([74.125.82.174]) (using TLSv1) by na3sys009aob116.postini.com ([74.125.148.12]) with SMTP ID DSNKTdaFotzRfWfo/zwDYTMduGnDt9BdL1Ae@postini.com; Fri, 20 May 2011 08:15:47 PDT Received: by mail-wy0-f174.google.com with SMTP id 21so4117481wya.33 for ; Fri, 20 May 2011 08:15:46 -0700 (PDT) Received: by 10.216.233.92 with SMTP id o70mr4209144weq.71.1305904546282; Fri, 20 May 2011 08:15:46 -0700 (PDT) Received: from localhost ([192.91.60.233]) by mx.google.com with ESMTPS id y35sm1900846weq.15.2011.05.20.08.15.44 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 20 May 2011 08:15:45 -0700 (PDT) From: Kevin Hilman To: linux-omap@vger.kernel.org, Grant Likely , Linus Walleij Cc: linux-arm-kernel@lists.infradead.org Subject: [PATCH 13/14] GPIO: OMAP: debounce remove SoC specific registers, use pdata Date: Fri, 20 May 2011 17:14:56 +0200 Message-Id: <1305904497-26013-14-git-send-email-khilman@ti.com> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: <1305904497-26013-1-git-send-email-khilman@ti.com> References: <1305904497-26013-1-git-send-email-khilman@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Fri, 20 May 2011 15:15:51 +0000 (UTC) Use register offsets passed in from pdata for accessing debounce registers. Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/gpio.c | 4 ++++ arch/arm/plat-omap/include/plat/gpio.h | 2 ++ drivers/gpio/gpio_omap.c | 15 +++------------ 3 files changed, 9 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c index cc26677..316d930 100644 --- a/arch/arm/mach-omap2/gpio.c +++ b/arch/arm/mach-omap2/gpio.c @@ -81,6 +81,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) pdata->regs->irqenable = OMAP24XX_GPIO_IRQENABLE1; pdata->regs->set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1; pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1; + pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL; + pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN; break; case 2: pdata->bank_type = METHOD_GPIO_44XX; @@ -94,6 +96,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0; pdata->regs->set_irqenable = OMAP4_GPIO_IRQSTATUSSET0; pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0; + pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME; + pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE; break; default: WARN(1, "Invalid gpio bank_type\n"); diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h index c7e3a56..7a3f067 100644 --- a/arch/arm/plat-omap/include/plat/gpio.h +++ b/arch/arm/plat-omap/include/plat/gpio.h @@ -185,6 +185,8 @@ struct omap_gpio_reg_offs { u16 irqenable; u16 set_irqenable; u16 clr_irqenable; + u16 debounce; + u16 debounce_en; bool irqenable_inv; }; diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c index b5e2e94..072d568 100644 --- a/drivers/gpio/gpio_omap.c +++ b/drivers/gpio/gpio_omap.c @@ -168,7 +168,7 @@ do { \ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, unsigned debounce) { - void __iomem *reg = bank->base; + void __iomem *reg; u32 val; u32 l; @@ -184,19 +184,10 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, l = GPIO_BIT(bank, gpio); - if (bank->method == METHOD_GPIO_44XX) - reg += OMAP4_GPIO_DEBOUNCINGTIME; - else - reg += OMAP24XX_GPIO_DEBOUNCE_VAL; - + reg = bank->base + bank->regs->debounce; __raw_writel(debounce, reg); - reg = bank->base; - if (bank->method == METHOD_GPIO_44XX) - reg += OMAP4_GPIO_DEBOUNCENABLE; - else - reg += OMAP24XX_GPIO_DEBOUNCE_EN; - + reg = bank->base + bank->regs->debounce_en; val = __raw_readl(reg); if (debounce) {