From patchwork Fri May 20 15:14:47 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 803932 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.3) with ESMTP id p4KFFHMw009605 for ; Fri, 20 May 2011 15:15:17 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933585Ab1ETPPQ (ORCPT ); Fri, 20 May 2011 11:15:16 -0400 Received: from na3sys009aog114.obsmtp.com ([74.125.149.211]:42676 "EHLO na3sys009aog114.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933376Ab1ETPPP (ORCPT ); Fri, 20 May 2011 11:15:15 -0400 Received: from mail-wy0-f171.google.com ([74.125.82.171]) (using TLSv1) by na3sys009aob114.postini.com ([74.125.148.12]) with SMTP ID DSNKTdaFgvpxIS4qr/2wEoQcW7X3rkCzFJY1@postini.com; Fri, 20 May 2011 08:15:15 PDT Received: by mail-wy0-f171.google.com with SMTP id 32so4130069wyb.16 for ; Fri, 20 May 2011 08:15:14 -0700 (PDT) Received: by 10.227.100.212 with SMTP id z20mr4262702wbn.27.1305904513698; Fri, 20 May 2011 08:15:13 -0700 (PDT) Received: from localhost ([192.91.60.233]) by mx.google.com with ESMTPS id w12sm2351503wby.58.2011.05.20.08.15.12 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 20 May 2011 08:15:12 -0700 (PDT) From: Kevin Hilman To: linux-omap@vger.kernel.org, Grant Likely , Linus Walleij Cc: linux-arm-kernel@lists.infradead.org Subject: [PATCH 04/14] GPIO: OMAP: _get_gpio_irqbank_mask: replace hard-coded mask with bank->width Date: Fri, 20 May 2011 17:14:47 +0200 Message-Id: <1305904497-26013-5-git-send-email-khilman@ti.com> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: <1305904497-26013-1-git-send-email-khilman@ti.com> References: <1305904497-26013-1-git-send-email-khilman@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Fri, 20 May 2011 15:15:17 +0000 (UTC) Replace hard-coded mask values with bank->width which is already coming from platform_data. Signed-off-by: Kevin Hilman --- drivers/gpio/gpio_omap.c | 8 +------- 1 files changed, 1 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/gpio_omap.c b/drivers/gpio/gpio_omap.c index 4691ed8..1b7896e 100644 --- a/drivers/gpio/gpio_omap.c +++ b/drivers/gpio/gpio_omap.c @@ -718,46 +718,40 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) void __iomem *reg = bank->base; int inv = 0; u32 l; - u32 mask; + u32 mask = (1 << bank->width) - 1; switch (bank->method) { #ifdef CONFIG_ARCH_OMAP1 case METHOD_MPUIO: reg += OMAP_MPUIO_GPIO_MASKIT / bank->stride; - mask = 0xffff; inv = 1; break; #endif #ifdef CONFIG_ARCH_OMAP15XX case METHOD_GPIO_1510: reg += OMAP1510_GPIO_INT_MASK; - mask = 0xffff; inv = 1; break; #endif #ifdef CONFIG_ARCH_OMAP16XX case METHOD_GPIO_1610: reg += OMAP1610_GPIO_IRQENABLE1; - mask = 0xffff; break; #endif #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) case METHOD_GPIO_7XX: reg += OMAP7XX_GPIO_INT_MASK; - mask = 0xffffffff; inv = 1; break; #endif #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) case METHOD_GPIO_24XX: reg += OMAP24XX_GPIO_IRQENABLE1; - mask = 0xffffffff; break; #endif #if defined(CONFIG_ARCH_OMAP4) case METHOD_GPIO_44XX: reg += OMAP4_GPIO_IRQSTATUSSET0; - mask = 0xffffffff; break; #endif default: