From patchwork Wed May 25 23:38:48 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 818742 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.3) with ESMTP id p4PNdEMp010299 for ; Wed, 25 May 2011 23:39:14 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756377Ab1EYXjM (ORCPT ); Wed, 25 May 2011 19:39:12 -0400 Received: from na3sys009aog112.obsmtp.com ([74.125.149.207]:43081 "EHLO na3sys009aog112.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754904Ab1EYXjL (ORCPT ); Wed, 25 May 2011 19:39:11 -0400 Received: from mail-gy0-f169.google.com ([209.85.160.169]) (using TLSv1) by na3sys009aob112.postini.com ([74.125.148.12]) with SMTP ID DSNKTd2THjVkr0Pneq/8nu0p6/o8ySD90w+x@postini.com; Wed, 25 May 2011 16:39:11 PDT Received: by gyd8 with SMTP id 8so91510gyd.14 for ; Wed, 25 May 2011 16:39:10 -0700 (PDT) Received: by 10.91.131.16 with SMTP id i16mr284755agn.61.1306366749820; Wed, 25 May 2011 16:39:09 -0700 (PDT) Received: from localhost (dragon.ti.com [192.94.94.33]) by mx.google.com with ESMTPS id c19sm241108anm.41.2011.05.25.16.39.08 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 25 May 2011 16:39:09 -0700 (PDT) From: Nishanth Menon To: linux-omap Cc: Kevin , Nishanth Menon Subject: [PM-WIP_CPUFREQ][PATCH V3 3/8] OMAP2+: cpufreq: use opp/clk_*cpufreq_table based on silicon Date: Wed, 25 May 2011 16:38:48 -0700 Message-Id: <1306366733-8439-4-git-send-email-nm@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1306366733-8439-1-git-send-email-nm@ti.com> References: <1306366733-8439-1-git-send-email-nm@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Wed, 25 May 2011 23:39:14 +0000 (UTC) OMAP2 is the only family using clk_[init|exit]_cpufreq_table, while OMAP3+ use OPP table to generate and release the cpufreq tables. Hence use a flag to mark which API to use for allocating and freeing the tables. Signed-off-by: Nishanth Menon --- arch/arm/mach-omap2/omap2plus-cpufreq.c | 20 +++++++++++++++----- 1 files changed, 15 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c index 2d4e9d7..dbbf8b2 100644 --- a/arch/arm/mach-omap2/omap2plus-cpufreq.c +++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c @@ -44,6 +44,7 @@ static struct cpufreq_frequency_table *freq_table; static struct clk *mpu_clk; static char *mpu_clk_name; static struct device *mpu_dev; +static bool use_opp; static int omap_verify_speed(struct cpufreq_policy *policy) { @@ -166,7 +167,10 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) return -EINVAL; policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); - opp_init_cpufreq_table(mpu_dev, &freq_table); + if (use_opp) + opp_init_cpufreq_table(mpu_dev, &freq_table); + else + clk_init_cpufreq_table(&freq_table); if (freq_table) { result = cpufreq_frequency_table_cpuinfo(policy, freq_table); @@ -204,7 +208,10 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) static int omap_cpu_exit(struct cpufreq_policy *policy) { - clk_exit_cpufreq_table(&freq_table); + if (use_opp) + opp_free_cpufreq_table(mpu_dev, &freq_table); + else + clk_exit_cpufreq_table(&freq_table); clk_put(mpu_clk); return 0; } @@ -227,12 +234,15 @@ static struct cpufreq_driver omap_driver = { static int __init omap_cpufreq_init(void) { - if (cpu_is_omap24xx()) + use_opp = true; + if (cpu_is_omap24xx()) { mpu_clk_name = "virt_prcm_set"; - else if (cpu_is_omap34xx()) + use_opp = false; + } else if (cpu_is_omap34xx()) { mpu_clk_name = "dpll1_ck"; - else if (cpu_is_omap44xx()) + } else if (cpu_is_omap44xx()) { mpu_clk_name = "dpll_mpu_ck"; + } if (!mpu_clk_name) { pr_err("%s: unsupported Silicon?\n", __func__);