From patchwork Fri Jul 1 08:52:30 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jarkko Nikula X-Patchwork-Id: 934962 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p618r7vB005006 for ; Fri, 1 Jul 2011 08:53:08 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755323Ab1GAIxG (ORCPT ); Fri, 1 Jul 2011 04:53:06 -0400 Received: from mail-bw0-f46.google.com ([209.85.214.46]:58452 "EHLO mail-bw0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755729Ab1GAIxF (ORCPT ); Fri, 1 Jul 2011 04:53:05 -0400 Received: by mail-bw0-f46.google.com with SMTP id 5so2453487bwd.19 for ; Fri, 01 Jul 2011 01:53:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=1IfgzWoEoZnKDysYbvTPuJHDPxCZL3IebTMIli69mj0=; b=uZRemN3IoQOuDadyBYkpkV0ytsTKSGTH99nZC0hq86chPa6ZTGvjDN5wTp4FuwZoOb fGCEp43zC6D2tWDsZ8lISNOeu7+oWvki1MFeGmcAJb/1KIPnigxJM3DE5UAeulCHosEE UH2mMD0NaKMiImReUXZ7CTIhe+Y73tpHEYkoA= Received: by 10.204.135.206 with SMTP id o14mr2911914bkt.143.1309510384801; Fri, 01 Jul 2011 01:53:04 -0700 (PDT) Received: from localhost (host-94-101-4-66.igua.fi [94.101.4.66]) by mx.google.com with ESMTPS id k16sm2819537bks.1.2011.07.01.01.53.03 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 01 Jul 2011 01:53:04 -0700 (PDT) From: Jarkko Nikula To: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Janusz Krzysztofik , Peter Ujfalusi , Jarkko Nikula Subject: [RFC 06/12] omap: mcbsp: Implement generic register and cache access Date: Fri, 1 Jul 2011 11:52:30 +0300 Message-Id: <1309510356-27147-7-git-send-email-jhnikula@gmail.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1309510356-27147-1-git-send-email-jhnikula@gmail.com> References: <1309510356-27147-1-git-send-email-jhnikula@gmail.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Fri, 01 Jul 2011 08:53:08 +0000 (UTC) Get rid of is_omap tests in omap_mcbsp_write and omap_mcbsp_read by using register size and register step variables that are passed via platform data Signed-off-by: Jarkko Nikula --- arch/arm/mach-omap1/mcbsp.c | 2 + arch/arm/mach-omap2/mcbsp.c | 7 ++++++ arch/arm/plat-omap/include/plat/mcbsp.h | 2 + arch/arm/plat-omap/mcbsp.c | 32 +++++++++++++++++------------- 4 files changed, 29 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 3c985ac..36ab5d8 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -391,6 +391,8 @@ static void omap_mcbsp_register_board_cfg(struct resource *res, int res_count, continue; platform_device_add_resources(new_mcbsp, &res[i * res_count], res_count); + config[i].reg_size = 2; + config[i].reg_step = 2; new_mcbsp->dev.platform_data = &config[i]; ret = platform_device_add(new_mcbsp); if (ret) { diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 4a6ef6a..1408156 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -137,6 +137,13 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) pdata->buffer_size = 0x80; } + pdata->reg_step = 4; + if (oh->class->rev < MCBSP_CONFIG_TYPE2) + pdata->reg_size = 2; + else + pdata->reg_size = 4; + + oh_device[0] = oh; if (oh->dev_attr) { diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 2202457..31b24c9 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -320,6 +320,8 @@ struct omap_mcbsp_platform_data { #endif u16 buffer_size; unsigned int mcbsp_config_type; + u8 reg_size; + u8 reg_step; }; struct omap_mcbsp_st_data { diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index a7ced1b..92d6d4f 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -36,31 +36,35 @@ int omap_mcbsp_count, omap_mcbsp_cache_size; static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) { - if (cpu_class_is_omap1()) { - reg /= 2; - ((u16 *)mcbsp->reg_cache)[reg / sizeof(u16)] = (u16)val; - __raw_writew((u16)val, mcbsp->io_base + reg); - } else if (cpu_is_omap2420()) { - ((u16 *)mcbsp->reg_cache)[reg / sizeof(u32)] = (u16)val; + int index; + + if (mcbsp->pdata->reg_size == 2 && mcbsp->pdata->reg_step == 2) + reg /= 2; /* Calculate OMAP1 register offset */ + + index = reg / mcbsp->pdata->reg_step; + if (mcbsp->pdata->reg_size == 2) { + ((u16 *)mcbsp->reg_cache)[index] = (u16)val; __raw_writew((u16)val, mcbsp->io_base + reg); } else { - ((u32 *)mcbsp->reg_cache)[reg / sizeof(u32)] = val; + ((u32 *)mcbsp->reg_cache)[index] = val; __raw_writel(val, mcbsp->io_base + reg); } } static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache) { - if (cpu_class_is_omap1()) { - reg /= 2; - return !from_cache ? __raw_readw(mcbsp->io_base + reg) : - ((u16 *)mcbsp->reg_cache)[reg / sizeof(u16)]; - } else if (cpu_is_omap2420()) { + int index; + + if (mcbsp->pdata->reg_size == 2 && mcbsp->pdata->reg_step == 2) + reg /= 2; /* Calculate OMAP1 register offset */ + + index = reg / mcbsp->pdata->reg_step; + if (mcbsp->pdata->reg_size == 2) { return !from_cache ? __raw_readw(mcbsp->io_base + reg) : - ((u16 *)mcbsp->reg_cache)[reg / sizeof(u32)]; + ((u16 *)mcbsp->reg_cache)[index]; } else { return !from_cache ? __raw_readl(mcbsp->io_base + reg) : - ((u32 *)mcbsp->reg_cache)[reg / sizeof(u32)]; + ((u32 *)mcbsp->reg_cache)[index]; } }