From patchwork Wed Aug 24 13:09:11 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Cousson X-Patchwork-Id: 1092262 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p7ODBYfa007664 for ; Wed, 24 Aug 2011 13:11:35 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751580Ab1HXNL2 (ORCPT ); Wed, 24 Aug 2011 09:11:28 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:51994 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751341Ab1HXNLQ (ORCPT ); Wed, 24 Aug 2011 09:11:16 -0400 Received: from dlep33.itg.ti.com ([157.170.170.112]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id p7ODB9ax013135 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 24 Aug 2011 08:11:09 -0500 Received: from dlep26.itg.ti.com (smtp-le.itg.ti.com [157.170.170.27]) by dlep33.itg.ti.com (8.13.7/8.13.8) with ESMTP id p7ODB9sk011869; Wed, 24 Aug 2011 08:11:09 -0500 (CDT) Received: from DFLE70.ent.ti.com (localhost [127.0.0.1]) by dlep26.itg.ti.com (8.13.8/8.13.8) with ESMTP id p7ODB941027676; Wed, 24 Aug 2011 08:11:09 -0500 (CDT) Received: from dlelxv22.itg.ti.com (172.17.1.197) by dfle70.ent.ti.com (128.247.5.40) with Microsoft SMTP Server id 14.1.323.3; Wed, 24 Aug 2011 08:11:08 -0500 Received: from localhost.localdomain (lncpu04.tif.ti.com [137.167.102.15]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id p7ODA8Hf023561; Wed, 24 Aug 2011 08:11:06 -0500 From: Benoit Cousson To: , CC: , , , , , Benoit Cousson , Randy Dunlap Subject: [RFC PATCH 05/10] documentation/dt: Add mpu, dsp and iva bindings Date: Wed, 24 Aug 2011 15:09:11 +0200 Message-ID: <1314191356-10963-6-git-send-email-b-cousson@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1314191356-10963-1-git-send-email-b-cousson@ti.com> References: <1314191356-10963-1-git-send-email-b-cousson@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Wed, 24 Aug 2011 13:11:35 +0000 (UTC) Add documentation for the OMAP4 processors bindings. Signed-off-by: Benoit Cousson Cc: Randy Dunlap --- Documentation/devicetree/bindings/arm/omap/dsp.txt | 14 ++++++++ Documentation/devicetree/bindings/arm/omap/iva.txt | 18 ++++++++++ Documentation/devicetree/bindings/arm/omap/mpu.txt | 35 ++++++++++++++++++++ 3 files changed, 67 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/omap/dsp.txt create mode 100644 Documentation/devicetree/bindings/arm/omap/iva.txt create mode 100644 Documentation/devicetree/bindings/arm/omap/mpu.txt diff --git a/Documentation/devicetree/bindings/arm/omap/dsp.txt b/Documentation/devicetree/bindings/arm/omap/dsp.txt new file mode 100644 index 0000000..8fcd82c --- /dev/null +++ b/Documentation/devicetree/bindings/arm/omap/dsp.txt @@ -0,0 +1,14 @@ +* TI - DSP (Digital Signal Processor) + +TI DSP included in OMAP SoC + +Required properties: +- compatible : Should be "ti,c64" for OMAP3 & 4 +- hwmods: "dsp" + +Examples: + +dsp { + compatible = "ti,omap4-c64", "ti,c64"; + hwmods = "dsp"; +}; diff --git a/Documentation/devicetree/bindings/arm/omap/iva.txt b/Documentation/devicetree/bindings/arm/omap/iva.txt new file mode 100644 index 0000000..f428e88 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/omap/iva.txt @@ -0,0 +1,18 @@ +* TI - IVA (Imaging and Video Accelerator) subsystem + +The IVA contain various audio, video or imaging HW accelerator +depending of the version. + +Required properties: +- compatible : Should be: + - "ti,ivahd", "ti,iva" for OMAP4 + - "ti,iva2", "ti,iva" for OMAP3 + - "ti,iva1", "ti,iva" for OMAP2 +- hwmods: "iva" + +Examples: + +iva { + compatible = "ti,ivahd", "ti,iva"; + hwmods = "iva"; +}; diff --git a/Documentation/devicetree/bindings/arm/omap/mpu.txt b/Documentation/devicetree/bindings/arm/omap/mpu.txt new file mode 100644 index 0000000..eadab5a --- /dev/null +++ b/Documentation/devicetree/bindings/arm/omap/mpu.txt @@ -0,0 +1,35 @@ +* TI - MPU (Main Processor Unit) subsystem + +The MPU subsystem contain one or several ARM cores +depending of the version. +The MPU contain CPUs, GIC, L2 cache and a local PRCM. + +Required properties: +- compatible : Should be "ti,omap4-mpu" for OMAP4 +- hwmods: "mpu" + +Examples: + +- For an OMAP4 SMP system: + +mpu { + compatible = "ti,omap4-mpu"; + hwmods = "mpu"; + cpu@0 { + compatible = "arm,cortex-a9"; + }; + cpu@1 { + compatible = "arm,cortex-a9"; + }; +}; + + +- For an OMAP3 monocore system: + +mpu { + compatible = "ti,omap3-mpu"; + hwmods = "mpu"; + cpu@0 { + compatible = "arm,cortex-a8"; + }; +};