From patchwork Tue Sep 25 09:32:41 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 1503291 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 7D51D3FE65 for ; Tue, 25 Sep 2012 09:33:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754488Ab2IYJdI (ORCPT ); Tue, 25 Sep 2012 05:33:08 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:33048 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754468Ab2IYJdH (ORCPT ); Tue, 25 Sep 2012 05:33:07 -0400 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id q8P9X4j1027662; Tue, 25 Sep 2012 04:33:04 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q8P9X31m006305; Tue, 25 Sep 2012 04:33:03 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by dfle72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.1.323.3; Tue, 25 Sep 2012 04:33:03 -0500 Received: from localhost.localdomain (h64-6.vpn.ti.com [172.24.64.6]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id q8P9WrIg017624; Tue, 25 Sep 2012 04:33:02 -0500 From: Tero Kristo To: , , CC: Subject: [PATCHv5 06/10] ARM: OMAP3: do not delete per_clkdm autodeps during idle Date: Tue, 25 Sep 2012 12:32:41 +0300 Message-ID: <1348565565-14744-7-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1348565565-14744-1-git-send-email-t-kristo@ti.com> References: <1348565565-14744-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Previously, PER clock domain was always enabled, as the usecounts for this domain incorrectly always showed positive value. On HW level though, the domain enters idle as it is set in HW supervised mode. Now, when the usecounts reflect real values, PER domain will be put to HWSUP sleep mode, which means its autodeps are deleted. Removing wakedeps for PER domain will cause multiple problems. First of all, coming back from idle, PER domain remains idle as the wakedeps have been disabled for the domain, and this causes a crash with the GPIO code, as the resume code attempts to access domain which is not active. Just enabling the interface clocks for the GPIO does not help, as they are autoidled and don't bring the domain out of idle. Secondly, there are multiple erratas for omap3, which say that the wakedeps should be enabled for the PER domain, see e.g. errata i582 for omap3630. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/clockdomains3xxx_data.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c b/arch/arm/mach-omap2/clockdomains3xxx_data.c index 56089c4..3b3c524 100644 --- a/arch/arm/mach-omap2/clockdomains3xxx_data.c +++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c @@ -370,7 +370,7 @@ static struct clockdomain usbhost_am35x_clkdm = { static struct clockdomain per_clkdm = { .name = "per_clkdm", .pwrdm = { .name = "per_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, + .flags = CLKDM_CAN_HWSUP_SWSUP | CLKDM_NO_AUTODEP_DISABLE, .dep_bit = OMAP3430_EN_PER_SHIFT, .wkdep_srcs = per_wkdeps, .sleepdep_srcs = per_sleepdeps,