From patchwork Wed Oct 3 22:24:15 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 1543521 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 67F0840AC9 for ; Wed, 3 Oct 2012 22:24:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756704Ab2JCWYT (ORCPT ); Wed, 3 Oct 2012 18:24:19 -0400 Received: from mail-pa0-f46.google.com ([209.85.220.46]:60564 "EHLO mail-pa0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754475Ab2JCWYS (ORCPT ); Wed, 3 Oct 2012 18:24:18 -0400 Received: by padhz1 with SMTP id hz1so6789916pad.19 for ; Wed, 03 Oct 2012 15:24:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=bcrTJNMi4ycRyCkt/AYCOek8AW8pC7KUV+qEjJNy9A8=; b=CFLWDBd2oe84FOgfFTJwFiOZEsY7RqzwmEkV9z2ctBaCI1Iv0pObKictjEXDse6TZi BEITCPB0zfwEVr5qHnZHxgq+xzXeMoRdIBkXJrFuNxi40a4XQ/QyThkXzxsseRpLPx9b 9jOjgOS8uXsiNjQtRyN/FpzWCU9FlFvcy0yJqASYhxW096B4qWp+pZsoMQtfQnX4pMWI UooJzhZ4CBRux9vJM089s5UF5THJ3XaqIs0wUL8JMlv6sID16VwINtC7Li6cEN6bswNi Rip3m5v5TC0vWj1W6rrDTaLYVOe+j4dgsoVpa1vNsP4PbKb34JisbUP4ANwSuA0GzfSv 2bbQ== Received: by 10.68.222.105 with SMTP id ql9mr16271865pbc.97.1349303057581; Wed, 03 Oct 2012 15:24:17 -0700 (PDT) Received: from localhost (c-24-19-7-36.hsd1.wa.comcast.net. [24.19.7.36]) by mx.google.com with ESMTPS id qd9sm3221929pbb.31.2012.10.03.15.24.16 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 03 Oct 2012 15:24:16 -0700 (PDT) From: Kevin Hilman To: Tony Lindgren , Paul Walmsley , linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Subject: [PATCH] ARM: OMAP2+: PM: MPU DVFS: use generic CPU device for MPU-SS Date: Wed, 3 Oct 2012 15:24:15 -0700 Message-Id: <1349303055-27741-1-git-send-email-khilman@deeprootsystems.com> X-Mailer: git-send-email 1.7.9.2 X-Gm-Message-State: ALoCoQnSFgHmAK5tMxyPxH92EAxTjPYhyRYt6/PH1sbCKggScWHk8yq7IIz1pIzlKYWL4cQk1kVt Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Kevin Hilman Currently, a dummy omap_device is created for the MPU sub-system so that a device node exists for MPU DVFS. Specifically, for the association of MPU OPPs to a device node, and so that a voltage regulator can be mapped to a device node. For drivers to get a handle to this device node, an OMAP-specific API has been used. However, the kernel already has device nodes for the CPU(s) in the system, so we can use those instead of an OMAP-specific dummy device and then drivers (like OMAP CPUfreq) can use generic APIs. To use the existing CPU device nodes, modify the OPP creation and regulator registration to use the CPU0 device node for registraion. NOTE: this patch always uses CPU0 as the device node. On all OMAPs today, MPU DVFS scales all CPUs together, so this will not be a problem, but this assumption will need to be changed if independently scalable CPUs are introduced. Cc: Paul Walmsley Signed-off-by: Kevin Hilman --- Applies on current Linus master. Targetted for v3.7-rc1 so CPUfreq driver can be cleaned of plat includes (follow on series) arch/arm/mach-omap2/opp.c | 23 +++++++++++++++++------ arch/arm/mach-omap2/pm.c | 11 ++++++++++- arch/arm/mach-omap2/twl-common.c | 2 +- 3 files changed, 28 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c index 45ad7f7..58e16ae 100644 --- a/arch/arm/mach-omap2/opp.c +++ b/arch/arm/mach-omap2/opp.c @@ -18,6 +18,7 @@ */ #include #include +#include #include @@ -62,13 +63,23 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def, __func__, i); return -EINVAL; } - oh = omap_hwmod_lookup(opp_def->hwmod_name); - if (!oh || !oh->od) { - pr_debug("%s: no hwmod or odev for %s, [%d] cannot add OPPs.\n", - __func__, opp_def->hwmod_name, i); - continue; + + if (!strncmp(opp_def->hwmod_name, "mpu", 3)) { + /* + * All current OMAPs share voltage rail and + * clock source, so CPU0 is used to represent + * the MPU-SS. + */ + dev = get_cpu_device(0); + } else { + oh = omap_hwmod_lookup(opp_def->hwmod_name); + if (!oh || !oh->od) { + pr_debug("%s: no hwmod or odev for %s, [%d] cannot add OPPs.\n", + __func__, opp_def->hwmod_name, i); + continue; + } + dev = &oh->od->pdev->dev; } - dev = &oh->od->pdev->dev; r = opp_add(dev, opp_def->freq, opp_def->u_volt); if (r) { diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 939bd6f..173c2be 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -16,6 +16,7 @@ #include #include #include +#include #include @@ -168,7 +169,15 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, goto exit; } - dev = omap_device_get_by_hwmod_name(oh_name); + if (!strncmp(oh_name, "mpu", 3)) + /* + * All current OMAPs share voltage rail and clock + * source, so CPU0 is used to represent the MPU-SS. + */ + dev = get_cpu_device(0); + else + dev = omap_device_get_by_hwmod_name(oh_name); + if (IS_ERR(dev)) { pr_err("%s: Unable to get dev pointer for hwmod %s\n", __func__, oh_name); diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c index 45f7741..3f5eacc 100644 --- a/arch/arm/mach-omap2/twl-common.c +++ b/arch/arm/mach-omap2/twl-common.c @@ -158,7 +158,7 @@ static struct regulator_init_data omap3_vpll2_idata = { }; static struct regulator_consumer_supply omap3_vdd1_supply[] = { - REGULATOR_SUPPLY("vcc", "mpu.0"), + REGULATOR_SUPPLY("vcc", "cpu0"), }; static struct regulator_consumer_supply omap3_vdd2_supply[] = {