From patchwork Fri Oct 19 14:59:01 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Hunter, Jon" X-Patchwork-Id: 1618841 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 52CF4DF2AB for ; Fri, 19 Oct 2012 14:59:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753548Ab2JSO7V (ORCPT ); Fri, 19 Oct 2012 10:59:21 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:51471 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751368Ab2JSO7V (ORCPT ); Fri, 19 Oct 2012 10:59:21 -0400 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id q9JExA4E032649; Fri, 19 Oct 2012 09:59:10 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9JExAow008389; Fri, 19 Oct 2012 09:59:10 -0500 Received: from dlelxv23.itg.ti.com (172.17.1.198) by dfle72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.1.323.3; Fri, 19 Oct 2012 09:59:10 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlelxv23.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9JExACm027860; Fri, 19 Oct 2012 09:59:10 -0500 Received: from localhost (h56-108.vpn.ti.com [172.24.56.108]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id q9JEx9w20069; Fri, 19 Oct 2012 09:59:09 -0500 (CDT) From: Jon Hunter To: Benoit Cousson , Tony Lindgren , Paul Walmsley , Rob Herring , Grant Likely CC: device-tree , linux-omap , linux-arm , Vaibhav Hiremath , Jon Hunter Subject: [PATCH V4 2/5] ARM: OMAP3: Dynamically disable secure timer nodes for secure devices Date: Fri, 19 Oct 2012 09:59:01 -0500 Message-ID: <1350658744-13509-3-git-send-email-jon-hunter@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1350658744-13509-1-git-send-email-jon-hunter@ti.com> References: <1350658744-13509-1-git-send-email-jon-hunter@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org OMAP3 devices may or may not have security features enabled. Security enabled devices are known as high-secure (HS) and devices without security are known as general purpose (GP). For OMAP3 devices there are 12 general purpose timers available. On secure devices the 12th timer is reserved for secure usage and so cannot be used by the kernel, where as for a GP device it is available. We can detect the OMAP device type, secure or GP, at runtime via an on-chip register. Today, when not using DT, we do not register the 12th timer as a linux device if the device is secure. When using device tree, device tree is going to register all the timer devices it finds in the device tree blob. To prevent device tree from registering 12th timer on a secure OMAP3 device we can add a status property to the timer binding with the value "disabled" at boot time. Note that timer 12 on a OMAP3 device has a property "ti,timer-secure" to indicate that it will not be available on a secure device and so for secure OMAP3 devices, we search for timers with this property and then disable them. Using the prom_add_property() function to dynamically add a property was a recommended approach suggested by Rob Herring [1]. I have tested this on an OMAP3 GP device and faking it to pretend to be a secure device to ensure that any timers marked with "ti,timer-secure" are not registered on boot. I have also made sure that all timers are registered as expected on a GP device by default. [1] http://comments.gmane.org/gmane.linux.ports.arm.omap/79203 Signed-off-by: Jon Hunter --- arch/arm/mach-omap2/timer.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 44f9aa7..96d26f2 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -144,6 +144,41 @@ static struct clock_event_device clockevent_gpt = { .set_mode = omap2_gp_timer_set_mode, }; +static struct property device_disabled = { + .name = "status", + .length = sizeof("disabled"), + .value = "disabled", +}; + +static struct of_device_id omap_timer_match[] __initdata = { + { .compatible = "ti,omap2-timer", }, + { } +}; + +/** + * omap_dmtimer_init - initialisation function when device tree is used + * + * For secure OMAP3 devices, timers with device type "timer-secure" cannot + * be used by the kernel as they are reserved. Therefore, to prevent the + * kernel registering these devices remove them dynamically from the device + * tree on boot. + */ +void __init omap_dmtimer_init(void) +{ + struct device_node *np; + + if (!cpu_is_omap34xx()) + return; + + /* If we are a secure device, remove any secure timer nodes */ + if ((omap_type() != OMAP2_DEVICE_TYPE_GP)) { + for_each_matching_node(np, omap_timer_match) { + if (of_get_property(np, "ti,timer-secure", NULL)) + prom_add_property(np, &device_disabled); + } + } +} + static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, int gptimer_id, const char *fck_source) @@ -437,6 +472,7 @@ static inline void __init realtime_counter_init(void) clksrc_nr, clksrc_src) \ static void __init omap##name##_timer_init(void) \ { \ + omap_dmtimer_init(); \ omap2_gp_clockevent_init((clkev_nr), clkev_src); \ omap2_clocksource_init((clksrc_nr), clksrc_src); \ }