From patchwork Tue Oct 23 18:09:31 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 1631741 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 96AC0DF2F7 for ; Tue, 23 Oct 2012 18:09:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932622Ab2JWSJg (ORCPT ); Tue, 23 Oct 2012 14:09:36 -0400 Received: from mail-pb0-f46.google.com ([209.85.160.46]:44273 "EHLO mail-pb0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932571Ab2JWSJe (ORCPT ); Tue, 23 Oct 2012 14:09:34 -0400 Received: by mail-pb0-f46.google.com with SMTP id rr4so616840pbb.19 for ; Tue, 23 Oct 2012 11:09:34 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=sC0f7CrXd2VwVBV000XaVjh1dz+MFkabIACCqCVioJg=; b=VWrdE5Q9stt/kL1tGuCr9U6cBTz6ApiEgJHgsEqAr1ETovWUCs6jQ5zuiP8pKLj7Ie U6J05FP99GRnjcV1Tt/6U0pgW7IGLzSnIVfsmI/xL2aAE3CDIxjyZsGkGZIbh7FB4H03 heTQtuGcbQl0mABVNQd/YcZRNu1PizeskkxeQVs2kQlBt/fXgYml7V0hzDAIymAsAhZk Az4RtBHCbyvJZMtDpdipfQsKHHEEQ6HeW3BaI3c14ceU0frbCe46CFb39I3KOocH9u/P C2ACP/pHQLDgTIfeR4utsUXHL7xVvgvQNPRXriZjaDtSsmo4/tU8BKUdLym6IqsqtIzg 4HSQ== Received: by 10.66.75.168 with SMTP id d8mr37265081paw.63.1351015773968; Tue, 23 Oct 2012 11:09:33 -0700 (PDT) Received: from localhost (c-24-19-7-36.hsd1.wa.comcast.net. [24.19.7.36]) by mx.google.com with ESMTPS id b6sm7177165pav.33.2012.10.23.11.09.32 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 23 Oct 2012 11:09:33 -0700 (PDT) From: Kevin Hilman To: Linus Walleij , Felipe Balbi , linux-omap@vger.kernel.org Cc: Paul Walmsley , linux-arm-kernel@lists.infradead.org, Igor Grinberg Subject: [PATCH] gpio/omap: fix off-mode bug: clear debounce clock enable mask on disable Date: Tue, 23 Oct 2012 11:09:31 -0700 Message-Id: <1351015771-6308-1-git-send-email-khilman@deeprootsystems.com> X-Mailer: git-send-email 1.8.0 X-Gm-Message-State: ALoCoQlqi2+1tpr9/hyHayt29nn5gm718B66x9VDj+u61rx0JtARXLwdFxZho6tLCtdNCOIvUK/4 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Kevin Hilman When debounce clocks are disabled, ensure that the banks dbck_enable_mask is cleared also. Otherwise, context restore on subsequent off-mode transition will restore previous value from the shadow copies (bank->context.debounce*) leading to mismatch state between driver state and hardware state. This was discovered when board code was doing gpio_request_one() gpio_set_debounce() gpio_free() which was leaving the GPIO debounce settings in a confused state. Then, enabling off mode causing bogus state to be restored, leaving GPIO debounce enabled which then prevented the CORE powerdomain from transitioning. Reported-by: Paul Walmsley Cc: Igor Grinberg Signed-off-by: Kevin Hilman Acked-by: Santosh Shilimkar Acked-by: Igor Grinberg --- Applies on v3.7-rc2, targetted for v3.7. drivers/gpio/gpio-omap.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 94cbc84..dee2856 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -187,6 +187,7 @@ static inline void _gpio_dbck_disable(struct gpio_bank *bank) * to detect events and generate interrupts at least on OMAP3. */ __raw_writel(0, bank->base + bank->regs->debounce_en); + bank->dbck_enable_mask = 0; clk_disable(bank->dbck); bank->dbck_enabled = false;