From patchwork Wed Oct 24 09:29:00 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 1636651 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 49B453FD4E for ; Wed, 24 Oct 2012 09:29:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934466Ab2JXJ3m (ORCPT ); Wed, 24 Oct 2012 05:29:42 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:47952 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933474Ab2JXJ3j (ORCPT ); Wed, 24 Oct 2012 05:29:39 -0400 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id q9O9Tdle029883; Wed, 24 Oct 2012 04:29:39 -0500 Received: from DLEE74.ent.ti.com (dlee74.ent.ti.com [157.170.170.8]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9O9Td7C018898; Wed, 24 Oct 2012 04:29:39 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE74.ent.ti.com (157.170.170.8) with Microsoft SMTP Server id 14.1.323.3; Wed, 24 Oct 2012 04:29:38 -0500 Received: from deskari.tieu.ti.com (h64-3.vpn.ti.com [172.24.64.3]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9O9TOBJ028560; Wed, 24 Oct 2012 04:29:38 -0500 From: Tomi Valkeinen To: , , CC: Tomi Valkeinen Subject: [PATCH 09/20] OMAPDSS: add dispc_ovl_enabled() Date: Wed, 24 Oct 2012 12:29:00 +0300 Message-ID: <1351070951-18616-10-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1351070951-18616-1-git-send-email-tomi.valkeinen@ti.com> References: <1351070951-18616-1-git-send-email-tomi.valkeinen@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add new dispc function, dispc_ovl_enabled(). This returns if the overlay enable bit is set in the registers. Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dispc.c | 5 +++++ drivers/video/omap2/dss/dss.h | 1 + 2 files changed, 6 insertions(+) diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index b5cdbaf..3fd60ce 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -2589,6 +2589,11 @@ int dispc_ovl_enable(enum omap_plane plane, bool enable) return 0; } +bool dispc_ovl_enabled(enum omap_plane plane) +{ + return REG_GET(DISPC_OVL_ATTRIBUTES(plane), 0, 0); +} + static void dispc_mgr_disable_isr(void *data, u32 mask) { struct completion *compl = data; diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h index b007aee..be7678c 100644 --- a/drivers/video/omap2/dss/dss.h +++ b/drivers/video/omap2/dss/dss.h @@ -428,6 +428,7 @@ int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi, bool replication, const struct omap_video_timings *mgr_timings, bool mem_to_mem); int dispc_ovl_enable(enum omap_plane plane, bool enable); +bool dispc_ovl_enabled(enum omap_plane plane); void dispc_ovl_set_channel_out(enum omap_plane plane, enum omap_channel channel);