From patchwork Mon Nov 5 12:52:52 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lokesh Vutla X-Patchwork-Id: 1696931 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id B101D3FCDE for ; Mon, 5 Nov 2012 12:53:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752521Ab2KEMxL (ORCPT ); Mon, 5 Nov 2012 07:53:11 -0500 Received: from bear.ext.ti.com ([192.94.94.41]:39968 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752281Ab2KEMxI (ORCPT ); Mon, 5 Nov 2012 07:53:08 -0500 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id qA5CqxuY029495; Mon, 5 Nov 2012 06:53:00 -0600 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id qA5CqvvP024597; Mon, 5 Nov 2012 18:22:59 +0530 (IST) Received: from dbdp33.itg.ti.com (172.24.170.252) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Mon, 5 Nov 2012 18:22:58 +0530 Received: from a0131933lt.apr.dhcp.ti.com (smtpvbd.itg.ti.com [172.24.170.250]) by dbdp33.itg.ti.com (8.13.8/8.13.8) with ESMTP id qA5CqroL009676; Mon, 5 Nov 2012 18:22:58 +0530 From: Lokesh Vutla To: CC: , , , , Subject: [PATCH V3 3/3] ARM: dts: omap5-evm: LPDDR2 memory device details for EVM Date: Mon, 5 Nov 2012 18:22:52 +0530 Message-ID: <1352119972-13710-4-git-send-email-lokeshvutla@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1352119972-13710-1-git-send-email-lokeshvutla@ti.com> References: <1352119972-13710-1-git-send-email-lokeshvutla@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Samsung's K3PE0E000B memory part is used in OMAP5-evm board. Adding timings and geometry details for Samsung's memory part and attaching the same to device-handle of EMIF1/2. Signed-off-by: Lokesh Vutla --- arch/arm/boot/dts/omap5-evm.dts | 11 +++++ arch/arm/boot/dts/samsung_k3pe0e000b.dtsi | 67 +++++++++++++++++++++++++++++ 2 files changed, 78 insertions(+) create mode 100644 arch/arm/boot/dts/samsung_k3pe0e000b.dtsi diff --git a/arch/arm/boot/dts/omap5-evm.dts b/arch/arm/boot/dts/omap5-evm.dts index 88d3d9b8..8722c15 100644 --- a/arch/arm/boot/dts/omap5-evm.dts +++ b/arch/arm/boot/dts/omap5-evm.dts @@ -8,6 +8,7 @@ /dts-v1/; /include/ "omap5.dtsi" +/include/ "samsung_k3pe0e000b.dtsi" / { model = "TI OMAP5 EVM board"; @@ -140,3 +141,13 @@ &mcbsp3 { status = "disabled"; }; + +&emif1 { + cs1-used; + device-handle = <&samsung_K3PE0E000B>; +}; + +&emif2 { + cs1-used; + device-handle = <&samsung_K3PE0E000B>; +}; diff --git a/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi b/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi new file mode 100644 index 0000000..9657a5c --- /dev/null +++ b/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi @@ -0,0 +1,67 @@ +/* + * Timings and Geometry for Samsung K3PE0E000B memory part + */ + +/ { + samsung_K3PE0E000B: lpddr2 { + compatible = "Samsung,K3PE0E000B","jedec,lpddr2-s4"; + density = <4096>; + io-width = <32>; + + tRPab-min-tck = <3>; + tRCD-min-tck = <3>; + tWR-min-tck = <3>; + tRASmin-min-tck = <3>; + tRRD-min-tck = <2>; + tWTR-min-tck = <2>; + tXP-min-tck = <2>; + tRTP-min-tck = <2>; + tCKE-min-tck = <3>; + tCKESR-min-tck = <3>; + tFAW-min-tck = <8>; + + timings_samsung_K3PE0E000B_533MHz: lpddr2-timings@0 { + compatible = "jedec,lpddr2-timings"; + min-freq = <10000000>; + max-freq = <533333333>; + tRPab = <21000>; + tRCD = <18000>; + tWR = <15000>; + tRAS-min = <42000>; + tRRD = <10000>; + tWTR = <7500>; + tXP = <7500>; + tRTP = <7500>; + tCKESR = <15000>; + tDQSCK-max = <5500>; + tFAW = <50000>; + tZQCS = <90000>; + tZQCL = <360000>; + tZQinit = <1000000>; + tRAS-max-ns = <70000>; + tDQSCK-max-derated = <6000>; + }; + + timings_samsung_K3PE0E000B_266MHz: lpddr2-timings@1 { + compatible = "jedec,lpddr2-timings"; + min-freq = <10000000>; + max-freq = <266666666>; + tRPab = <21000>; + tRCD = <18000>; + tWR = <15000>; + tRAS-min = <42000>; + tRRD = <10000>; + tWTR = <7500>; + tXP = <7500>; + tRTP = <7500>; + tCKESR = <15000>; + tDQSCK-max = <5500>; + tFAW = <50000>; + tZQCS = <90000>; + tZQCL = <360000>; + tZQinit = <1000000>; + tRAS-max-ns = <70000>; + tDQSCK-max-derated = <6000>; + }; + }; +};