From patchwork Thu Nov 15 15:58:14 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 1750101 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id E888BDF2AB for ; Thu, 15 Nov 2012 15:59:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933339Ab2KOP7T (ORCPT ); Thu, 15 Nov 2012 10:59:19 -0500 Received: from arroyo.ext.ti.com ([192.94.94.40]:52163 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1768185Ab2KOP7S (ORCPT ); Thu, 15 Nov 2012 10:59:18 -0500 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id qAFFxITZ003769; Thu, 15 Nov 2012 09:59:18 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id qAFFxIO4029617; Thu, 15 Nov 2012 09:59:18 -0600 Received: from dlelxv22.itg.ti.com (172.17.1.197) by dfle72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.1.323.3; Thu, 15 Nov 2012 09:59:17 -0600 Received: from deskari.tieu.ti.com (h68-10.vpn.ti.com [172.24.68.10]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id qAFFx6v3025421; Thu, 15 Nov 2012 09:59:16 -0600 From: Tomi Valkeinen To: Archit Taneja , Rob Clark CC: , , Tomi Valkeinen Subject: [PATCH 06/32] OMAPDSS: DISPC: Remove blocking code from dispc_wb_enable() Date: Thu, 15 Nov 2012 17:58:14 +0200 Message-ID: <1352995120-3288-7-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1352995120-3288-1-git-send-email-tomi.valkeinen@ti.com> References: <1352995120-3288-1-git-send-email-tomi.valkeinen@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org WB will not be used with compat-mode, i.e. from omapfb. This means we don't need the current complex dispc_wb_enable function, but can have a simple register write version of the function. This patch removes all the extra code from dispc_wb_enable() Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dispc.c | 35 ++--------------------------------- 1 file changed, 2 insertions(+), 33 deletions(-) diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index 0972bd3..0dca3ff 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -2804,43 +2804,12 @@ void dispc_mgr_disable_sync(enum omap_channel channel) void dispc_wb_enable(bool enable) { - enum omap_plane plane = OMAP_DSS_WB; - struct completion frame_done_completion; - bool is_on; - int r; - u32 irq; - - is_on = REG_GET(DISPC_OVL_ATTRIBUTES(plane), 0, 0); - irq = DISPC_IRQ_FRAMEDONEWB; - - if (!enable && is_on) { - init_completion(&frame_done_completion); - - r = omap_dispc_register_isr(dispc_mgr_disable_isr, - &frame_done_completion, irq); - if (r) - DSSERR("failed to register FRAMEDONEWB isr\n"); - } - - REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable ? 1 : 0, 0, 0); - - if (!enable && is_on) { - if (!wait_for_completion_timeout(&frame_done_completion, - msecs_to_jiffies(100))) - DSSERR("timeout waiting for FRAMEDONEWB\n"); - - r = omap_dispc_unregister_isr(dispc_mgr_disable_isr, - &frame_done_completion, irq); - if (r) - DSSERR("failed to unregister FRAMEDONEWB isr\n"); - } + REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(OMAP_DSS_WB), enable ? 1 : 0, 0, 0); } bool dispc_wb_is_enabled(void) { - enum omap_plane plane = OMAP_DSS_WB; - - return REG_GET(DISPC_OVL_ATTRIBUTES(plane), 0, 0); + return REG_GET(DISPC_OVL_ATTRIBUTES(OMAP_DSS_WB), 0, 0); } static void dispc_lcd_enable_signal_polarity(bool act_high)