From patchwork Tue Dec 18 12:56:18 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Hebbar, Gururaja" X-Patchwork-Id: 1891671 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id C6744DF23A for ; Tue, 18 Dec 2012 12:56:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754556Ab2LRM4F (ORCPT ); Tue, 18 Dec 2012 07:56:05 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:48213 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754317Ab2LRM4D (ORCPT ); Tue, 18 Dec 2012 07:56:03 -0500 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id qBICttTi032035; Tue, 18 Dec 2012 06:55:56 -0600 Received: from DBDE70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id qBICtq67018633; Tue, 18 Dec 2012 18:25:53 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by dbde70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 14.1.323.3; Tue, 18 Dec 2012 18:25:52 +0530 Received: from ucmsshproxy.india.ext.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with SMTP id qBICtm8c012719; Tue, 18 Dec 2012 18:25:49 +0530 Received: from symphony.india.ext.ti.com (unknown [192.168.247.13]) by ucmsshproxy.india.ext.ti.com (Postfix) with ESMTP id E22EC158002; Tue, 18 Dec 2012 18:25:48 +0530 (IST) Received: from localhost.localdomain (ubuntu-psp-linux [192.168.247.46]) by symphony.india.ext.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id qBICtlR02007; Tue, 18 Dec 2012 18:25:47 +0530 (IST) From: Hebbar Gururaja To: , , , CC: , , , , , Subject: [PATCH v2] ARM: OMAP2: hwmod: Fix "register offset NULL check" bug Date: Tue, 18 Dec 2012 18:26:18 +0530 Message-ID: <1355835378-23437-1-git-send-email-gururaja.hebbar@ti.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: "Hebbar, Gururaja" omap4_cminst_wait_module_ready() checks if register offset is NULL. int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) { int i = 0; if (!clkctrl_offs) return 0; In case of AM33xx, CLKCTRL register offset for different clock domains are not uniformly placed. An example of this would be the RTC clock domain with CLKCTRL offset at 0x00. In such cases the module ready check is skipped which leads to a data abort during boot-up when RTC registers is accessed. Since the actual base address is verified in omap4_cminst_read_inst_reg(), this check here is not required at all and hence can be removed. Signed-off-by: Hebbar, Gururaja --- Changes in v2: - update commit message to reflect the actual cause. Previous message conveyed a wrong/opposite message. :100644 100644 7f9a464... 40545ff... M arch/arm/mach-omap2/cminst44xx.c arch/arm/mach-omap2/cminst44xx.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index 7f9a464..40545ff 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -271,9 +271,6 @@ int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, { int i = 0; - if (!clkctrl_offs) - return 0; - omap_test_timeout(_is_module_ready(part, inst, cdoffs, clkctrl_offs), MAX_MODULE_READY_TIME, i);