From patchwork Fri Jan 18 04:57:46 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: avinash philip X-Patchwork-Id: 1999071 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 6A032DF280 for ; Fri, 18 Jan 2013 04:57:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754412Ab3ARE50 (ORCPT ); Thu, 17 Jan 2013 23:57:26 -0500 Received: from comal.ext.ti.com ([198.47.26.152]:35578 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752798Ab3ARE5Z (ORCPT ); Thu, 17 Jan 2013 23:57:25 -0500 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r0I4vERp032710; Thu, 17 Jan 2013 22:57:14 -0600 Received: from DBDE70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r0I4v94H009252; Fri, 18 Jan 2013 10:27:10 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by dbde70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 14.1.323.3; Fri, 18 Jan 2013 10:27:09 +0530 Received: from ucmsshproxy.india.ext.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with SMTP id r0I4v22K007436; Fri, 18 Jan 2013 10:27:03 +0530 Received: from symphony.india.ext.ti.com (unknown [192.168.247.13]) by ucmsshproxy.india.ext.ti.com (Postfix) with ESMTP id 7B53E158002; Fri, 18 Jan 2013 10:26:59 +0530 (IST) Received: from ubuntu-psp-linux.india.ext.ti.com (ubuntu-psp-linux [192.168.247.46]) by symphony.india.ext.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id r0I4usR01758; Fri, 18 Jan 2013 10:26:54 +0530 (IST) From: Philip Avinash To: , , , , , CC: , , , , , , , Philip Avinash Subject: [PATCH] ARM: OMAP: gpmc: Add device tree documentation for elm handle Date: Fri, 18 Jan 2013 10:27:46 +0530 Message-ID: <1358485066-27495-1-git-send-email-avinashphilip@ti.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org In case ELM module available, omap2 NAND driver can opt for hardware correction method for bit flip errors in NAND flash with BCH. Hence the detection of ELM module is done through devicetree population of elm_id. This patch update device tree documentation for gpmc-nand for elm-id data population. Signed-off-by: Philip Avinash --- This patch based [1] and depends on [2]. As Artem suggested, this patch can go in omap_tree due to the dependency on [3]. Discussion can found at [4] Tony, Can you accept this patch. 1. http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap.git;a=shortlog;h=refs/heads/omap-for-v3.9/gpmc 2. mtd: nand: omap2: Support for hardware BCH error correction http://git.infradead.org/users/dedekind/l2-mtd-2.6.git/commit/576daed18c3f27bb5d0e57e1df11e8f7b493dce8 3. ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap.git;a=commit;h=bc6b1e7b86f5d8e4a6fc1c0189e64bba4077efe0 4. https://lkml.org/lkml/2013/1/17/167 .../devicetree/bindings/mtd/gpmc-nand.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt index 9f464f9..e7f8d7e 100644 --- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt +++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt @@ -29,6 +29,9 @@ Optional properties: "bch4" 4-bit BCH ecc code "bch8" 8-bit BCH ecc code + - elm_id: Specifies elm device node. This is required to support BCH + error correction using ELM module. + For inline partiton table parsing (optional): - #address-cells: should be set to 1 @@ -46,6 +49,7 @@ Example for an AM33xx board: #address-cells = <2>; #size-cells = <1>; ranges = <0 0 0x08000000 0x2000>; /* CS0: NAND */ + elm_id = <&elm>; nand@0,0 { reg = <0 0 0>; /* CS0, offset 0 */