From patchwork Fri Jan 18 07:19:24 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Bedia X-Patchwork-Id: 1999461 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id C816C3FD86 for ; Fri, 18 Jan 2013 07:19:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751156Ab3ARHTv (ORCPT ); Fri, 18 Jan 2013 02:19:51 -0500 Received: from arroyo.ext.ti.com ([192.94.94.40]:49883 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751044Ab3ARHTv (ORCPT ); Fri, 18 Jan 2013 02:19:51 -0500 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id r0I7JjKJ002901; Fri, 18 Jan 2013 01:19:46 -0600 Received: from DBDE70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r0I7JfU0028821; Fri, 18 Jan 2013 12:49:45 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by dbde70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 14.1.323.3; Fri, 18 Jan 2013 12:49:42 +0530 Received: from localhost.localdomain (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id r0I7JbaF026026; Fri, 18 Jan 2013 12:49:41 +0530 From: Vaibhav Bedia To: , , CC: , , , , Vaibhav Bedia Subject: [PATCH 4/9] ARM: OMAP2+: AM33XX: hwmod: Update TPTC0 hwmod with the right flags Date: Fri, 18 Jan 2013 12:49:24 +0530 Message-ID: <1358493569-17142-5-git-send-email-vaibhav.bedia@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1358493569-17142-1-git-send-email-vaibhav.bedia@ti.com> References: <1358493569-17142-1-git-send-email-vaibhav.bedia@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Third Party Transfer Controller (TPTC0) needs to be idled and put to standby under SW control. Add the appropriate flags in the TPTC0 hwmod entry. Signed-off-by: Vaibhav Bedia Acked-by: Santosh Shilimkar --- Change from RFC version: Clarify TPTC in the changelog arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c index 8280f11..f2f408c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c @@ -1823,6 +1823,7 @@ static struct omap_hwmod am33xx_tptc0_hwmod = { .class = &am33xx_tptc_hwmod_class, .clkdm_name = "l3_clkdm", .mpu_irqs = am33xx_tptc0_irqs, + .flags = (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY), .main_clk = "l3_gclk", .prcm = { .omap4 = {