From patchwork Tue Jan 29 11:15:03 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Bedia X-Patchwork-Id: 2061061 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 996053FCD5 for ; Tue, 29 Jan 2013 11:15:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755561Ab3A2LPu (ORCPT ); Tue, 29 Jan 2013 06:15:50 -0500 Received: from bear.ext.ti.com ([192.94.94.41]:49830 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755511Ab3A2LPs (ORCPT ); Tue, 29 Jan 2013 06:15:48 -0500 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r0TBFZXM012188; Tue, 29 Jan 2013 05:15:36 -0600 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r0TBFVgR020618; Tue, 29 Jan 2013 16:45:34 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Tue, 29 Jan 2013 16:45:32 +0530 Received: from psplinux063.india.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id r0TBFPJQ026040; Tue, 29 Jan 2013 16:45:31 +0530 From: Vaibhav Bedia To: , , CC: , , , , Vaibhav Bedia Subject: [PATCH v3 4/9] ARM: OMAP2+: AM33XX: hwmod: Update TPTC0 hwmod with the right flags Date: Tue, 29 Jan 2013 16:45:03 +0530 Message-ID: <1359458108-8489-5-git-send-email-vaibhav.bedia@ti.com> X-Mailer: git-send-email 1.8.1 In-Reply-To: <1359458108-8489-1-git-send-email-vaibhav.bedia@ti.com> References: <1359458108-8489-1-git-send-email-vaibhav.bedia@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Third Party Transfer Controller (TPTC0) needs to be idled and put to standby under SW control. Add the appropriate flags in the TPTC0 hwmod entry. Signed-off-by: Vaibhav Bedia Acked-by: Santosh Shilimkar Acked-by: Peter Korsgaard --- v3: Add Peter's Acked-by v2: Drop unnecessary parens arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c index 8280f11..94254e8 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c @@ -1823,6 +1823,7 @@ static struct omap_hwmod am33xx_tptc0_hwmod = { .class = &am33xx_tptc_hwmod_class, .clkdm_name = "l3_clkdm", .mpu_irqs = am33xx_tptc0_irqs, + .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, .main_clk = "l3_gclk", .prcm = { .omap4 = {