@@ -48,6 +48,12 @@
0x126 0x0100 /* sdmmc1_dat7.sdmmc1_dat7 INPUT | MODE 0 */
>;
};
+
+ smsc911x_pins: pinmux_smsc911x_pins {
+ pinctrl-single,pins = <
+ 0x1a2 0x0104 /* mcspi1_cs2.gpio_176 INPUT | MODE4 */
+ >;
+ };
};
&i2c1 {
@@ -40,6 +40,18 @@
gpios = <&twl_gpio 19 1>;
};
};
+
+ vddvario: regulator-vddvario {
+ compatible = "regulator-fixed";
+ regulator-name = "vddvario";
+ regulator-always-on;
+ };
+
+ vdd33a: regulator-vdd33a {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd33a";
+ regulator-always-on;
+ };
};
&i2c3 {
@@ -54,3 +66,15 @@
reg = <0x50>;
};
};
+
+&gpmc {
+ gpmc_smsc911x@0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&smsc911x_pins>;
+ gpmc,cs = <5>; /* IGEP2_SMSC911X_CS */
+ gpmc,gpio_irq = <176>; /* IGEP2_SMSC911X_GPIO */
+ gpmc,flags = <18>; /* SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS */
+ vmmc-supply = <&vddvario>;
+ vmmc_aux-supply = <&vdd33a>;
+ };
+};
IGEPv2 boards has an SMSC LAN9221i ethernet chip connected to the OMAP3 processor though the General-Purpose Memory Controller. This patch adds a device node for the ethernet chip so the GPMC driver will call the gpmc-smsc911x setup code. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> --- arch/arm/boot/dts/omap3-igep.dtsi | 6 ++++++ arch/arm/boot/dts/omap3-igep0020.dts | 24 ++++++++++++++++++++++++ 2 files changed, 30 insertions(+), 0 deletions(-)