@@ -140,8 +140,6 @@
#define OMAP5430_MASK_CLEAR_ACCUM_MPU_MASK (1 << 15)
/* BANDGAP_COUNTER */
-#define OMAP5430_REPEAT_MODE_SHIFT 31
-#define OMAP5430_REPEAT_MODE_MASK (1 << 31)
#define OMAP5430_COUNTER_SHIFT 0
#define OMAP5430_COUNTER_MASK (0xffffff << 0)
@@ -203,7 +201,6 @@
/* 5430 - All goes relative to OPP_BGAP_GPU */
#define OMAP5430_FUSE_OPP_BGAP_GPU 0x0
#define OMAP5430_TEMP_SENSOR_GPU_OFFSET 0x150
-#define OMAP5430_BGAP_COUNTER_GPU_OFFSET 0x1C0
#define OMAP5430_BGAP_THRESHOLD_GPU_OFFSET 0x1A8
#define OMAP5430_BGAP_TSHUT_GPU_OFFSET 0x1B4
#define OMAP5430_BGAP_CUMUL_DTEMP_GPU_OFFSET 0x1C0
@@ -216,7 +213,6 @@
#define OMAP5430_FUSE_OPP_BGAP_MPU 0x4
#define OMAP5430_TEMP_SENSOR_MPU_OFFSET 0x14C
#define OMAP5430_BGAP_CTRL_OFFSET 0x1A0
-#define OMAP5430_BGAP_COUNTER_MPU_OFFSET 0x1BC
#define OMAP5430_BGAP_THRESHOLD_MPU_OFFSET 0x1A4
#define OMAP5430_BGAP_TSHUT_MPU_OFFSET 0x1B0
#define OMAP5430_BGAP_CUMUL_DTEMP_MPU_OFFSET 0x1BC
@@ -228,7 +224,6 @@
#define OMAP5430_FUSE_OPP_BGAP_CORE 0x8
#define OMAP5430_TEMP_SENSOR_CORE_OFFSET 0x154
-#define OMAP5430_BGAP_COUNTER_CORE_OFFSET 0x1C4
#define OMAP5430_BGAP_THRESHOLD_CORE_OFFSET 0x1AC
#define OMAP5430_BGAP_TSHUT_CORE_OFFSET 0x1B8
#define OMAP5430_BGAP_CUMUL_DTEMP_CORE_OFFSET 0x1C4
@@ -43,7 +43,7 @@ omap5430_mpu_temp_sensor_registers = {
.mask_clear_accum_mask = OMAP5430_MASK_CLEAR_ACCUM_MPU_MASK,
- .bgap_counter = OMAP5430_BGAP_COUNTER_MPU_OFFSET,
+ .bgap_counter = OMAP5430_BGAP_CTRL_OFFSET,
.counter_mask = OMAP5430_COUNTER_MASK,
.bgap_threshold = OMAP5430_BGAP_THRESHOLD_MPU_OFFSET,
@@ -87,7 +87,7 @@ omap5430_gpu_temp_sensor_registers = {
.mask_clear_mask = OMAP5430_MASK_CLEAR_GPU_MASK,
.mask_clear_accum_mask = OMAP5430_MASK_CLEAR_ACCUM_GPU_MASK,
- .bgap_counter = OMAP5430_BGAP_COUNTER_GPU_OFFSET,
+ .bgap_counter = OMAP5430_BGAP_CTRL_OFFSET,
.counter_mask = OMAP5430_COUNTER_MASK,
.bgap_threshold = OMAP5430_BGAP_THRESHOLD_GPU_OFFSET,
@@ -132,7 +132,7 @@ omap5430_core_temp_sensor_registers = {
.mask_clear_mask = OMAP5430_MASK_CLEAR_CORE_MASK,
.mask_clear_accum_mask = OMAP5430_MASK_CLEAR_ACCUM_CORE_MASK,
- .bgap_counter = OMAP5430_BGAP_COUNTER_CORE_OFFSET,
+ .bgap_counter = OMAP5430_BGAP_CTRL_OFFSET,
.counter_mask = OMAP5430_COUNTER_MASK,
.bgap_threshold = OMAP5430_BGAP_THRESHOLD_CORE_OFFSET,
On OMAP54xx there is only one counter register. For this reason, each domain must use the same counter register. This patch changes the data definition to coupe with this. Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com> --- drivers/staging/omap-thermal/omap-bandgap.h | 5 ----- drivers/staging/omap-thermal/omap5-thermal.c | 6 +++--- 2 files changed, 3 insertions(+), 8 deletions(-)