diff mbox

ARM: OMAP2+: am33xx: preserve JTAG clock aka debugss_ick.

Message ID 1362662007-13782-2-git-send-email-andreas.fenkart@streamunlimited.com (mailing list archive)
State New, archived
Headers show

Commit Message

Andreas Fenkart March 7, 2013, 1:13 p.m. UTC 
This fixes JTAG support on am33xx.

Signed-off-by: Andreas Fenkart <andreas.fenkart@streamunlimited.com>
---
 arch/arm/Kconfig.debug                |    6 ++++++
 arch/arm/mach-omap2/cclock33xx_data.c |   11 ++++++++---
 2 files changed, 14 insertions(+), 3 deletions(-)

Comments

Vaibhav Bedia March 7, 2013, 1:20 p.m. UTC | #1 
On Thu, Mar 07, 2013 at 18:43:27, Andreas Fenkart wrote:
> This fixes JTAG support on am33xx.
> 

Please refer to http://www.spinics.net/lists/linux-omap/msg87476.html

Regards,
Vaibhav
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diff mbox

Patch

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index acdddda..8120940 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -632,4 +632,10 @@  config PID_IN_CONTEXTIDR
 	  additional instructions during context switch. Say Y here only if you
 	  are planning to use hardware trace tools with this kernel.
 
+config JTAG
+	bool "Enable JTAG clock"
+	depends on SOC_AM33XX
+	help
+	  Enable or keep JTAG clock enabled
+
 endmenu
diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c
index 476b820..b7470de 100644
--- a/arch/arm/mach-omap2/cclock33xx_data.c
+++ b/arch/arm/mach-omap2/cclock33xx_data.c
@@ -429,9 +429,14 @@  DEFINE_STRUCT_CLK(smartreflex1_fck, dpll_core_ck_parents, clk_ops_null);
  *     - usbotg_fck (its additional clock and not really a modulemode)
  *     - ieee5000
  */
-DEFINE_CLK_GATE(debugss_ick, "dpll_core_m4_ck", &dpll_core_m4_ck, 0x0,
-		AM33XX_CM_WKUP_DEBUGSS_CLKCTRL, AM33XX_MODULEMODE_SWCTRL_SHIFT,
-		0x0, NULL);
+#ifdef CONFIG_JTAG
+#define DEBUGSS_FLAGS CLK_IGNORE_UNUSED
+#else
+#define DEBUGSS_FLAGS 0x0
+#endif
+DEFINE_CLK_GATE(debugss_ick, "dpll_core_m4_ck", &dpll_core_m4_ck,
+		DEBUGSS_FLAGS, AM33XX_CM_WKUP_DEBUGSS_CLKCTRL,
+		AM33XX_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
 
 DEFINE_CLK_GATE(mmu_fck, "dpll_core_m4_ck", &dpll_core_m4_ck, 0x0,
 		AM33XX_CM_GFX_MMUDATA_CLKCTRL, AM33XX_MODULEMODE_SWCTRL_SHIFT,