From patchwork Fri Mar 29 17:10:17 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Hiremath X-Patchwork-Id: 2366281 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id C9735E014A for ; Fri, 29 Mar 2013 17:18:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756401Ab3C2RSb (ORCPT ); Fri, 29 Mar 2013 13:18:31 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:57401 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756395Ab3C2RSa (ORCPT ); Fri, 29 Mar 2013 13:18:30 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r2THINHt002769; Fri, 29 Mar 2013 12:18:24 -0500 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r2THIJRR023959; Fri, 29 Mar 2013 22:48:20 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Fri, 29 Mar 2013 22:48:19 +0530 Received: from localhost.localdomain (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id r2THIFPT018549; Fri, 29 Mar 2013 22:48:19 +0530 From: Vaibhav Hiremath To: CC: , , , , , Vaibhav Hiremath Subject: [PATCH 2/2] ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clk Date: Fri, 29 Mar 2013 22:40:17 +0530 Message-ID: <1364577017-22562-3-git-send-email-hvaibhav@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1364577017-22562-1-git-send-email-hvaibhav@ti.com> References: <1364577017-22562-1-git-send-email-hvaibhav@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org WDT1 module can take one of the below clocks as input functional clock - - On-Chip 32K RC Osc [default/reset] - 32K from PRCM The On-Chip 32K RC Osc clock is not an accurate clock-source as per the design/spec, so as a result, for example, timer which supposed to get expired @60Sec, but will expire somewhere ~@40Sec, which is not expected by any use-case. The solution here is to switch the input clock-source to PRCM generated 32K clock-source during boot-time itself. Signed-off-by: Vaibhav Hiremath Cc: Santosh Shilimkar Cc: Benoit Cousson Cc: Paul Walmsley --- arch/arm/mach-omap2/cclock33xx_data.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c index 8327721..11e07b1 100644 --- a/arch/arm/mach-omap2/cclock33xx_data.c +++ b/arch/arm/mach-omap2/cclock33xx_data.c @@ -978,6 +978,14 @@ int __init am33xx_clk_init(void) clk_set_parent(&timer3_fck, &sys_clkin_ck); clk_set_parent(&timer6_fck, &sys_clkin_ck); + /* + * The On-Chip 32K RC Osc clock is not an accurate clock-source as per + * the design/spec, so as a result, for example, timer which supposed + * to get expired @60Sec, but will expire somewhere ~@40Sec, which is + * not expected by any use-case, so change WDT1 clock source to PRCM + * 32KHz clock. + */ + clk_set_parent(&wdt1_fck, &clkdiv32k_ick); return 0; }