From patchwork Wed Apr 17 16:32:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 2454541 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id E7630DF23A for ; Wed, 17 Apr 2013 16:33:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754663Ab3DQQdK (ORCPT ); Wed, 17 Apr 2013 12:33:10 -0400 Received: from bhuna.collabora.co.uk ([93.93.135.160]:37649 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752314Ab3DQQdJ (ORCPT ); Wed, 17 Apr 2013 12:33:09 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: javier) with ESMTPSA id 2F8B416984C9 From: Javier Martinez Canillas To: Benoit Cousson Cc: Tony Lindgren , Enric Balletbo i Serra , Jon Hunter , devicetree-discuss@lists.ozlabs.org, linux-omap , Javier Martinez Canillas Subject: [PATCH] ARM: dts: omap3-igep0020: Add SMSC911x LAN chip support Date: Wed, 17 Apr 2013 18:32:09 +0200 Message-Id: <1366216329-10677-1-git-send-email-javier.martinez@collabora.co.uk> X-Mailer: git-send-email 1.7.7.6 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The IGEPv2 board has an SMSC LAN9221i ethernet chip connected to the OMAP3 processor though the General-Purpose Memory Controller. This patch adds a device node for the ethernet chip as a GPMC child and all its dependencies (regulators, GPIO and pin muxs). Signed-off-by: Javier Martinez Canillas --- arch/arm/boot/dts/omap3-igep.dtsi | 6 ++++ arch/arm/boot/dts/omap3-igep0020.dts | 53 ++++++++++++++++++++++++++++++++++ 2 files changed, 59 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi index f8fe3b7..d5cd504 100644 --- a/arch/arm/boot/dts/omap3-igep.dtsi +++ b/arch/arm/boot/dts/omap3-igep.dtsi @@ -62,6 +62,12 @@ 0x126 0x0100 /* sdmmc1_dat7.sdmmc1_dat7 INPUT | MODE 0 */ >; }; + + smsc911x_pins: pinmux_smsc911x_pins { + pinctrl-single,pins = < + 0x1a2 0x0104 /* mcspi1_cs2.gpio_176 INPUT | MODE4 */ + >; + }; }; &i2c1 { diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index e2b9849..4bac32e 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -40,6 +40,18 @@ gpios = <&twl_gpio 19 1>; }; }; + + vddvario: regulator-vddvario { + compatible = "regulator-fixed"; + regulator-name = "vddvario"; + regulator-always-on; + }; + + vdd33a: regulator-vdd33a { + compatible = "regulator-fixed"; + regulator-name = "vdd33a"; + regulator-always-on; + }; }; &i2c3 { @@ -54,3 +66,44 @@ reg = <0x50>; }; }; + +&gpmc { + ranges = <5 0 0x2c000000 0x1000000>; + ethernet@5,0 { + pinctrl-names = "default"; + pinctrl-0 = <&smsc911x_pins>; + compatible = "smsc,lan9221", "smsc,lan9115"; + reg = <5 0 0xff>; + bank-width = <2>; + + gpmc,mux-add-data; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <186>; + gpmc,cs-wr-off-ns = <186>; + gpmc,adv-on-ns = <12>; + gpmc,adv-rd-off-ns = <48>; + gpmc,adv-wr-off-ns = <48>; + gpmc,oe-on-ns = <54>; + gpmc,oe-off-ns = <168>; + gpmc,we-on-ns = <54>; + gpmc,we-off-ns = <168>; + gpmc,rd-cycle-ns = <186>; + gpmc,wr-cycle-ns = <186>; + gpmc,access-ns = <114>; + gpmc,page-burst-access-ns = <6>; + gpmc,bus-turnaround-ns = <12>; + gpmc,cycle2cycle-delay-ns = <18>; + gpmc,wr-data-mux-bus-ns = <90>; + gpmc,wr-access-ns = <186>; + gpmc,cycle2cycle-samecsen; + gpmc,cycle2cycle-diffcsen; + + interrupt-parent = <&gpio6>; + interrupts = <16 8>; + vmmc-supply = <&vddvario>; + vmmc_aux-supply = <&vdd33a>; + reg-io-width = <4>; + + smsc,save-mac-address; + }; +};