From patchwork Tue May 7 09:39:34 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Hiremath X-Patchwork-Id: 2532561 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 5103ADF215 for ; Tue, 7 May 2013 09:45:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755822Ab3EGJpF (ORCPT ); Tue, 7 May 2013 05:45:05 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:56055 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755757Ab3EGJpC (ORCPT ); Tue, 7 May 2013 05:45:02 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r479ig4h027333; Tue, 7 May 2013 04:44:42 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id r479igpn019386; Tue, 7 May 2013 04:44:42 -0500 Received: from dlelxv23.itg.ti.com (172.17.1.198) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.2.342.3; Tue, 7 May 2013 04:44:41 -0500 Received: from localhost.localdomain (dbdp20.itg.ti.com [172.24.170.38]) by dlelxv23.itg.ti.com (8.13.8/8.13.8) with ESMTP id r479iYDG005453; Tue, 7 May 2013 04:44:40 -0500 From: Vaibhav Hiremath To: CC: , , , , Vaibhav Hiremath Subject: [PATCH 2/2] ARM: dts: AM33XX: Set pinmux for clkout2 pad used for clock output Date: Tue, 7 May 2013 15:09:34 +0530 Message-ID: <1367919574-21353-3-git-send-email-hvaibhav@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1367919574-21353-1-git-send-email-hvaibhav@ti.com> References: <1367919574-21353-1-git-send-email-hvaibhav@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org xdma_event_intr1.clkout2 pad can be used to source clock from either 32K OSC or any of the PLL (except MPU) outputs. On the existing AM335x based boards (EVM, EVM-SK and Bone), this pad is used to feed the clock to audio codes. So, this patch configures the pinmux to get clkout2 on the pad. Signed-off-by: Vaibhav Hiremath --- arch/arm/boot/dts/am335x-bone.dts | 8 +++++++- arch/arm/boot/dts/am335x-evm.dts | 8 +++++++- arch/arm/boot/dts/am335x-evmsk.dts | 8 +++++++- 3 files changed, 21 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index bfba6fc..f4630a3 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -26,7 +26,7 @@ am33xx_pinmux: pinmux@44e10800 { pinctrl-names = "default"; - pinctrl-0 = <>; + pinctrl-0 = <&clkout2_pin>; user_leds_s0: user_leds_s0 { pinctrl-single,pins = < @@ -50,6 +50,12 @@ 0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */ >; }; + + clkout2_pin: pinumx_clkout2_pin { + pinctrl-single,pins = < + 0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ + >; + }; }; ocp { diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index f598ed2..0673308 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -26,7 +26,7 @@ am33xx_pinmux: pinmux@44e10800 { pinctrl-names = "default"; - pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0>; + pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>; matrix_keypad_s0: matrix_keypad_s0 { pinctrl-single,pins = < @@ -65,6 +65,12 @@ 0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */ >; }; + + clkout2_pin: pinumx_clkout2_pin { + pinctrl-single,pins = < + 0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ + >; + }; }; ocp { diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 0eec644..a559389 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -32,7 +32,7 @@ am33xx_pinmux: pinmux@44e10800 { pinctrl-names = "default"; - pinctrl-0 = <&gpio_keys_s0>; + pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; user_leds_s0: user_leds_s0 { pinctrl-single,pins = < @@ -65,6 +65,12 @@ 0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */ >; }; + + clkout2_pin: pinumx_clkout2_pin { + pinctrl-single,pins = < + 0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ + >; + }; }; ocp {