From patchwork Fri May 31 22:45:55 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 2646091 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 7E69E3FD4E for ; Fri, 31 May 2013 22:46:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753187Ab3EaWqF (ORCPT ); Fri, 31 May 2013 18:46:05 -0400 Received: from mail-pb0-f42.google.com ([209.85.160.42]:44018 "EHLO mail-pb0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756511Ab3EaWqD (ORCPT ); Fri, 31 May 2013 18:46:03 -0400 Received: by mail-pb0-f42.google.com with SMTP id uo1so2947163pbc.1 for ; Fri, 31 May 2013 15:46:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=Pyahrf3N8/c6Ge9Y6L95p35sVXy80TPbxRrxgh+6s/A=; b=mojszrYauuwNYqQ2eqcwHFNL0Q6QytGL30SE/jeKFtiXe/8+m1jychxv0v7z1hNd5X smn49skw4DJx+1nWSzldOOSjl7Zr9Q7EuIRmX4w8Fj4sBP4HsoLBjjcTBdVASH19Fg/K 3HX9x6aM2YpZ4DLaD4gfLVmCgVOjr3hekMQlkx0oYRhzRG9/DPxcMNApysSoduenQbbG X0lcLD3apRTrCJRw8UoFVgVdEAzLqQfBthPQY/6j/9oOwsWLh75RelPR6uyZ4K4/lYfa 8GLfE/wjsFT6E5H8cqf0RLudm7RJV3rn/y7vMWFm5R3RTviSyKZeusaUzAUnXFlSml3R HMuQ== X-Received: by 10.66.17.137 with SMTP id o9mr7636374pad.142.1370040363027; Fri, 31 May 2013 15:46:03 -0700 (PDT) Received: from localhost (c-24-19-7-36.hsd1.wa.comcast.net. [24.19.7.36]) by mx.google.com with ESMTPSA id kv2sm48362701pbc.28.2013.05.31.15.46.01 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 31 May 2013 15:46:02 -0700 (PDT) From: Kevin Hilman To: Benoit Cousson , linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/3] ARM: DTS: OMAP3: beagle/overo: mux console UART, enable wakeup Date: Fri, 31 May 2013 15:45:55 -0700 Message-Id: <1370040357-25794-2-git-send-email-khilman@linaro.org> X-Mailer: git-send-email 1.8.2 In-Reply-To: <1370040357-25794-1-git-send-email-khilman@linaro.org> References: <1370040357-25794-1-git-send-email-khilman@linaro.org> X-Gm-Message-State: ALoCoQlvs6yenFbhzwhjEQOyFaLbhaURlXKMKrZ7iMHhUZx2v0RWbEnUQIY0i3tp3S1SIpmmF8CS Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Ensure the console uart (UART3) on these boards is mux'd correctly, and IO ring wakeup is enabled. This is needed for serial console wakeups when using DT boot. Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/omap3-beagle-xm.dts | 14 ++++++++++++++ arch/arm/boot/dts/omap3-beagle.dts | 12 ++++++++++++ arch/arm/boot/dts/omap3-overo.dtsi | 14 ++++++++++++++ 3 files changed, 40 insertions(+) diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts index 3046d1f..ca067b0 100644 --- a/arch/arm/boot/dts/omap3-beagle-xm.dts +++ b/arch/arm/boot/dts/omap3-beagle-xm.dts @@ -126,3 +126,17 @@ mode = <3>; power = <50>; }; + +&omap3_pmx_core { + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x16e 0x4100 /* uart3_rx_irrx.uart3_rx_irrx WAKEUP | INPUT | MODE0 */ + 0x170 0x0 /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */ + >; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +}; diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts index 6eec699..b004372 100644 --- a/arch/arm/boot/dts/omap3-beagle.dts +++ b/arch/arm/boot/dts/omap3-beagle.dts @@ -95,6 +95,13 @@ 0x1ae 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat7 INPUT | PULLDOWN */ >; }; + + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x16e 0x4100 /* uart3_rx_irrx.uart3_rx_irrx WAKEUP | INPUT | MODE0 */ + 0x170 0x0 /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */ + >; + }; }; &i2c1 { @@ -142,3 +149,8 @@ */ ti,pulldowns = <0x03a1c4>; }; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +}; diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi index a626c50..d63ed39 100644 --- a/arch/arm/boot/dts/omap3-overo.dtsi +++ b/arch/arm/boot/dts/omap3-overo.dtsi @@ -77,3 +77,17 @@ mode = <3>; power = <50>; }; + +&omap3_pmx_core { + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x16e 0x4100 /* uart3_rx_irrx.uart3_rx_irrx WAKEUP | INPUT | MODE0 */ + 0x170 0x0 /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */ + >; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +};