From patchwork Fri Jul 12 15:14:26 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Balbi X-Patchwork-Id: 2826991 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id AFFDB9F7D6 for ; Fri, 12 Jul 2013 15:15:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4B9242013A for ; Fri, 12 Jul 2013 15:15:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EBA5B20119 for ; Fri, 12 Jul 2013 15:15:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932970Ab3GLPPO (ORCPT ); Fri, 12 Jul 2013 11:15:14 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:34933 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932759Ab3GLPPN (ORCPT ); Fri, 12 Jul 2013 11:15:13 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r6CFElbs026178; Fri, 12 Jul 2013 10:14:47 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r6CFElJD010252; Fri, 12 Jul 2013 10:14:47 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Fri, 12 Jul 2013 10:14:46 -0500 Received: from localhost (h79-26.vpn.ti.com [172.24.79.26]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r6CFEkmr000836; Fri, 12 Jul 2013 10:14:46 -0500 From: Felipe Balbi To: Tony Lindgren CC: Linux OMAP Mailing List , Linux ARM Kernel Mailing List , Benoit Cousson , Felipe Balbi Subject: [PATCH] arm: omap5: hwmod: add missing ocp2scp hwmod data Date: Fri, 12 Jul 2013 18:14:26 +0300 Message-ID: <1373642066-5235-1-git-send-email-balbi@ti.com> X-Mailer: git-send-email 1.8.2.1 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Benoit Cousson without that hwmod data, USB3 will not in OMAP5 boards. While at that, also fix DTS data to pass reg property, otherwise driver won't probe. Signed-off-by: Benoit Cousson Signed-off-by: Felipe Balbi --- tested on OMAP5 uEVM. Gets rid of a data abort when USB3 is enabled. There still some other patches missing to get USB3 working out of the box, but that's on Palmas and will come as soon as I get those ready. This is already on step forward. arch/arm/boot/dts/omap5.dtsi | 3 +- arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 45 ++++++++++++++++++++++++++++++ 2 files changed, 47 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index da41d70..a0de586 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -654,10 +654,11 @@ }; }; - ocp2scp { + ocp2scp@4a080000 { compatible = "ti,omap-ocp2scp"; #address-cells = <1>; #size-cells = <1>; + reg = <0x4a080000 0x20>; ranges; ti,hwmods = "ocp2scp1"; usb2_phy: usb2phy@4a084000 { diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c index 2435109..d9118a1 100644 --- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c @@ -1105,6 +1105,42 @@ static struct omap_hwmod omap54xx_mpu_hwmod = { }; /* + * 'ocp2scp' class + * bridge to transform ocp interface protocol to scp (serial control port) + * protocol + */ + +static struct omap_hwmod_class_sysconfig omap54xx_ocp2scp_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .syss_offs = 0x0014, + .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE | + SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class omap54xx_ocp2scp_hwmod_class = { + .name = "ocp2scp", + .sysc = &omap54xx_ocp2scp_sysc, +}; + +/* ocp2scp1 */ +static struct omap_hwmod omap54xx_ocp2scp1_hwmod = { + .name = "ocp2scp1", + .class = &omap54xx_ocp2scp_hwmod_class, + .clkdm_name = "l3init_clkdm", + .main_clk = "l4_root_clk_div", + .prcm = { + .omap4 = { + .clkctrl_offs = OMAP54XX_CM_L3INIT_OCP2SCP1_CLKCTRL_OFFSET, + .context_offs = OMAP54XX_RM_L3INIT_OCP2SCP1_CONTEXT_OFFSET, + .modulemode = MODULEMODE_HWCTRL, + }, + }, +}; + +/* * 'timer' class * general purpose timer module with accurate 1ms tick * This class contains several variants: ['timer_1ms', 'timer'] @@ -1900,6 +1936,14 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__mpu = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l4_cfg -> ocp2scp1 */ +static struct omap_hwmod_ocp_if omap54xx_l4_cfg__ocp2scp1 = { + .master = &omap54xx_l4_cfg_hwmod, + .slave = &omap54xx_ocp2scp1_hwmod, + .clk = "l4_root_clk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + /* l4_wkup -> timer1 */ static struct omap_hwmod_ocp_if omap54xx_l4_wkup__timer1 = { .master = &omap54xx_l4_wkup_hwmod, @@ -2102,6 +2146,7 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = { &omap54xx_l4_per__mmc4, &omap54xx_l4_per__mmc5, &omap54xx_l4_cfg__mpu, + &omap54xx_l4_cfg__ocp2scp1, &omap54xx_l4_wkup__timer1, &omap54xx_l4_per__timer2, &omap54xx_l4_per__timer3,