From patchwork Mon Jul 15 14:55:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: pekon gupta X-Patchwork-Id: 2827567 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5A29C9F9A0 for ; Mon, 15 Jul 2013 14:57:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DFAC1201F7 for ; Mon, 15 Jul 2013 14:56:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D4214201FF for ; Mon, 15 Jul 2013 14:56:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932361Ab3GOO4u (ORCPT ); Mon, 15 Jul 2013 10:56:50 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:38851 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932342Ab3GOO4t (ORCPT ); Mon, 15 Jul 2013 10:56:49 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r6FEuBun011198; Mon, 15 Jul 2013 09:56:11 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r6FEuBVF014864; Mon, 15 Jul 2013 09:56:11 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.2.342.3; Mon, 15 Jul 2013 09:56:11 -0500 Received: from psplinux064.india.ti.com (psplinux064.india.ti.com [10.24.100.118]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r6FEtsNw022991; Mon, 15 Jul 2013 09:56:08 -0500 From: Pekon Gupta To: , CC: , , , , , , , Pekon Gupta Subject: [PATCH v1 4/5] mtd: devices: elm: add checks ELM H/W constrains, driver code cleanup Date: Mon, 15 Jul 2013 20:25:51 +0530 Message-ID: <1373900152-26885-5-git-send-email-pekon@ti.com> X-Mailer: git-send-email 1.8.1 In-Reply-To: <1373900152-26885-1-git-send-email-pekon@ti.com> References: <1373900152-26885-1-git-send-email-pekon@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP ELM H/W engine is used by BCHx_ECC schemes for detecting and locating bit-flips. However, ELM H/W engine has some constrains like: - ELM can decode errors in chunks of 512 data bytes only - ELM can operate max upto 8 such buffers in parallel This patch - add checks for above constrains - fixes ELM register configs based on number of info->eccsteps - cleans-up elm_load_syndrome() Signed-off-by: Pekon Gupta --- drivers/mtd/devices/elm.c | 114 ++++++++++++++++++++++---------------- drivers/mtd/nand/omap2.c | 2 +- include/linux/platform_data/elm.h | 6 +- 3 files changed, 70 insertions(+), 52 deletions(-) diff --git a/drivers/mtd/devices/elm.c b/drivers/mtd/devices/elm.c index 4f683d2..fca436e 100644 --- a/drivers/mtd/devices/elm.c +++ b/drivers/mtd/devices/elm.c @@ -22,8 +22,11 @@ #include #include #include +#include +#include #include +#define DRIVER_NAME "omap-elm" #define ELM_SYSCONFIG 0x010 #define ELM_IRQSTATUS 0x018 #define ELM_IRQENABLE 0x01c @@ -82,8 +85,10 @@ struct elm_info { void __iomem *elm_base; struct completion elm_completion; struct list_head list; + struct mtd_info *mtd; enum bch_ecc bch_type; struct elm_registers elm_regs; + int eccsteps; }; static LIST_HEAD(elm_devices); @@ -103,19 +108,36 @@ static u32 elm_read_reg(struct elm_info *info, int offset) * @dev: ELM device * @bch_type: Type of BCH ecc */ -int elm_config(struct device *dev, enum bch_ecc bch_type) +int elm_config(struct device *dev, struct mtd_info *mtd, + enum bch_ecc bch_type) { u32 reg_val; - struct elm_info *info = dev_get_drvdata(dev); - + struct elm_info *info = dev_get_drvdata(dev); + struct nand_chip *chip = mtd->priv; if (!info) { dev_err(dev, "Unable to configure elm - device not probed?\n"); return -ENODEV; } - + if (!mtd) { + pr_err("%s: MTD device not found", DRIVER_NAME); + return -EINVAL; + } + /* ELM supports error correction in chunks of 512bytes of data only + * where each 512bytes of data has its own ECC syndrome */ + if (chip->ecc.size != 512) { + pr_err("%s: invalid ecc_size configuration", DRIVER_NAME); + return -EINVAL; + } + /* ELM eccsteps required to decode complete NAND page */ + info->eccsteps = mtd->writesize / chip->ecc.size; + if (info->eccsteps > 8) { + pr_err("%s: eccsteps > 8 are not supported", DRIVER_NAME); + return -EINVAL; + } + info->mtd = mtd; + info->bch_type = bch_type; reg_val = (bch_type & ECC_BCH_LEVEL_MASK) | (ELM_ECC_SIZE << 16); elm_write_reg(info, ELM_LOCATION_CONFIG, reg_val); - info->bch_type = bch_type; return 0; } @@ -152,55 +174,51 @@ static void elm_configure_page_mode(struct elm_info *info, int index, * Load syndrome fragment registers with calculated ecc in reverse order. */ static void elm_load_syndrome(struct elm_info *info, - struct elm_errorvec *err_vec, u8 *ecc) + struct elm_errorvec *err_vec, u8 *ecc_calc) { + struct nand_chip *chip = info->mtd->priv; + unsigned int eccbytes = chip->ecc.bytes; + u8 *ecc = ecc_calc; int i, offset; u32 val; - for (i = 0; i < ERROR_VECTOR_MAX; i++) { - + for (i = 0; i < info->eccsteps; i++) { /* Check error reported */ if (err_vec[i].error_reported) { elm_configure_page_mode(info, i, true); - offset = ELM_SYNDROME_FRAGMENT_0 + - SYNDROME_FRAGMENT_REG_SIZE * i; - - /* BCH8 */ - if (info->bch_type) { - - /* syndrome fragment 0 = ecc[9-12B] */ - val = cpu_to_be32(*(u32 *) &ecc[9]); - elm_write_reg(info, offset, val); - - /* syndrome fragment 1 = ecc[5-8B] */ - offset += 4; - val = cpu_to_be32(*(u32 *) &ecc[5]); - elm_write_reg(info, offset, val); - - /* syndrome fragment 2 = ecc[1-4B] */ - offset += 4; - val = cpu_to_be32(*(u32 *) &ecc[1]); - elm_write_reg(info, offset, val); - - /* syndrome fragment 3 = ecc[0B] */ - offset += 4; - val = ecc[0]; - elm_write_reg(info, offset, val); - } else { - /* syndrome fragment 0 = ecc[20-52b] bits */ - val = (cpu_to_be32(*(u32 *) &ecc[3]) >> 4) | - ((ecc[2] & 0xf) << 28); - elm_write_reg(info, offset, val); - - /* syndrome fragment 1 = ecc[0-20b] bits */ - offset += 4; - val = cpu_to_be32(*(u32 *) &ecc[0]) >> 12; - elm_write_reg(info, offset, val); + offset = SYNDROME_FRAGMENT_REG_SIZE * i; + ecc = ecc_calc + (i * eccbytes); + switch (info->bch_type) { + case BCH4_ECC: + val = ((*(ecc + 6) >> 4) & 0x0F) | + *(ecc + 5) << 4 | *(ecc + 4) << 12 | + *(ecc + 3) << 20 | *(ecc + 2) << 28; + elm_write_reg(info, (ELM_SYNDROME_FRAGMENT_0 + + offset), cpu_to_le32(val)); + val = ((*(ecc + 2) >> 4) & 0x0F) | + *(ecc + 1) << 4 | *(ecc + 0) << 12; + elm_write_reg(info, (ELM_SYNDROME_FRAGMENT_1 + + offset), cpu_to_le32(val)); + break; + case BCH8_ECC: + val = *(ecc + 12) << 0 | *(ecc + 11) << 8 | + *(ecc + 10) << 16 | *(ecc + 9) << 24; + elm_write_reg(info, (ELM_SYNDROME_FRAGMENT_0 + + offset), cpu_to_le32(val)); + val = *(ecc + 8) << 0 | *(ecc + 7) << 8 | + *(ecc + 6) << 16 | *(ecc + 5) << 24; + elm_write_reg(info, (ELM_SYNDROME_FRAGMENT_1 + + offset), cpu_to_le32(val)); + val = *(ecc + 4) << 0 | *(ecc + 3) << 8 | + *(ecc + 2) << 16 | *(ecc + 1) << 24; + elm_write_reg(info, (ELM_SYNDROME_FRAGMENT_2 + + offset), cpu_to_le32(val)); + val = *(ecc + 0) << 0 & 0x000000FF; + elm_write_reg(info, (ELM_SYNDROME_FRAGMENT_3 + + offset), cpu_to_le32(val)); + break; } } - - /* Update ecc pointer with ecc byte size */ - ecc += info->bch_type ? BCH8_SIZE : BCH4_SIZE; } } @@ -223,7 +241,7 @@ static void elm_start_processing(struct elm_info *info, * Set syndrome vector valid, so that ELM module * will process it for vectors error is reported */ - for (i = 0; i < ERROR_VECTOR_MAX; i++) { + for (i = 0; i < info->eccsteps; i++) { if (err_vec[i].error_reported) { offset = ELM_SYNDROME_FRAGMENT_6 + SYNDROME_FRAGMENT_REG_SIZE * i; @@ -252,7 +270,7 @@ static void elm_error_correction(struct elm_info *info, int offset; u32 reg_val; - for (i = 0; i < ERROR_VECTOR_MAX; i++) { + for (i = 0; i < info->eccsteps; i++) { /* Check error reported */ if (err_vec[i].error_reported) { @@ -263,14 +281,12 @@ static void elm_error_correction(struct elm_info *info, if (reg_val & ECC_CORRECTABLE_MASK) { offset = ELM_ERROR_LOCATION_0 + ERROR_LOCATION_SIZE * i; - /* Read count of correctable errors */ err_vec[i].error_count = reg_val & ECC_NB_ERRORS_MASK; /* Update the error locations in error vector */ for (j = 0; j < err_vec[i].error_count; j++) { - reg_val = elm_read_reg(info, offset); err_vec[i].error_loc[j] = reg_val & ECC_ERROR_LOCATION_MASK; diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index a259761..7d786d9 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -1414,7 +1414,7 @@ static int is_elm_present(struct omap_nand_info *info, enum bch_ecc bch_type) pdev = of_find_device_by_node(elm_node); info->elm_dev = &pdev->dev; /* ELM module available, now configure it */ - elm_config(info->elm_dev, bch_type); + elm_config(info->elm_dev, &info->mtd, bch_type); return 0; } diff --git a/include/linux/platform_data/elm.h b/include/linux/platform_data/elm.h index bf0a83b..d16465b 100644 --- a/include/linux/platform_data/elm.h +++ b/include/linux/platform_data/elm.h @@ -25,6 +25,7 @@ enum bch_ecc { /* ELM support 8 error syndrome process */ #define ERROR_VECTOR_MAX 8 +#define ELM_MAX_DETECTABLE_ERRORS 16 #define BCH8_ECC_OOB_BYTES 13 #define BCH4_ECC_OOB_BYTES 7 @@ -45,10 +46,11 @@ struct elm_errorvec { bool error_reported; bool error_uncorrectable; int error_count; - int error_loc[ERROR_VECTOR_MAX]; + int error_loc[ELM_MAX_DETECTABLE_ERRORS]; }; void elm_decode_bch_error_page(struct device *dev, u8 *ecc_calc, struct elm_errorvec *err_vec); -int elm_config(struct device *dev, enum bch_ecc bch_type); +int elm_config(struct device *dev, struct mtd_info *mtd, + enum bch_ecc bch_type); #endif /* __ELM_H */