From patchwork Thu Sep 12 15:39:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: R Sricharan X-Patchwork-Id: 2878851 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0B57CBFF05 for ; Thu, 12 Sep 2013 15:42:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BB93120357 for ; Thu, 12 Sep 2013 15:42:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7EE1F20284 for ; Thu, 12 Sep 2013 15:42:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754385Ab3ILPk5 (ORCPT ); Thu, 12 Sep 2013 11:40:57 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:36345 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754352Ab3ILPky (ORCPT ); Thu, 12 Sep 2013 11:40:54 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r8CFeJEs000491; Thu, 12 Sep 2013 10:40:19 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r8CFeJ3W027147; Thu, 12 Sep 2013 10:40:19 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Thu, 12 Sep 2013 10:40:19 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id r8CFe270012413; Thu, 12 Sep 2013 10:40:15 -0500 From: Sricharan R To: , , , , CC: , , , , , , Subject: [RFC PATCH 2/4] ARM: DTS: DRA: Add crossbar device binding Date: Thu, 12 Sep 2013 21:09:09 +0530 Message-ID: <1379000351-15672-3-git-send-email-r.sricharan@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1379000351-15672-1-git-send-email-r.sricharan@ti.com> References: <1379000351-15672-1-git-send-email-r.sricharan@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds the irq crossbar device node. There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The Peripheral irq requests are connected to only one crossbar input and the output of the crossbar is connected to only one controller's input line. This models the crossbar as an interrupt controller. This a cascaded irqchip where the peripheral interrupt lines are connected to the crossbar and the crossbar's outputs are in turn connected to the GIC. Signed-off-by: Sricharan R --- arch/arm/boot/dts/dra7.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index a5d9350..da977e1 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -84,6 +84,7 @@ #size-cells = <1>; ranges; ti,hwmods = "l3_main_1", "l3_main_2"; + interrupt-parent = <&crossbar_mpu>; counter32k: counter@4ae04000 { compatible = "ti,omap-counter32k"; @@ -491,5 +492,20 @@ dmas = <&sdma 70>, <&sdma 71>; dma-names = "tx0", "rx0"; }; + + crossbar_mpu: @4a020000 { + compatible = "crossbar-irqchip"; + interrupt-parent = <&gic>; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x4a002a48 0x130>; + max-crossbar-lines = <512>; + max-irqs = <160>; + reg-size = <2>; + irqs-reserved = <0 1 2 3 5 6 131 132 139 140>; + #address-cells = <1>; + #size-cells = <1>; + }; + }; };