diff mbox

[v7,09/10] usb: dwc3: omap: manage "usb_otg_ss_refclk960m" clock

Message ID 1379508542-22389-10-git-send-email-rogerq@ti.com (mailing list archive)
State New, archived
Headers show

Commit Message

Roger Quadros Sept. 18, 2013, 12:49 p.m. UTC
"usb_otg_ss_refclk960m" is an optional functional clock to the
UBS_OTG_SS module. So manage it in the driver.

Also update device tree binding information.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 Documentation/devicetree/bindings/usb/omap-usb.txt |    4 ++++
 drivers/usb/dwc3/dwc3-omap.c                       |   13 +++++++++++++
 2 files changed, 17 insertions(+), 0 deletions(-)

Comments

Roger Quadros Sept. 23, 2013, 1:11 p.m. UTC | #1
Hi Felipe,

On 09/18/2013 03:49 PM, Roger Quadros wrote:
> "usb_otg_ss_refclk960m" is an optional functional clock to the
> UBS_OTG_SS module. So manage it in the driver.
> 

Just realized that "usb_otg_ss_refclk960m" is in fact functional clock to the 
PHY and not USB_OTG_SS module. The name is misleading.

So please ignore patch 9 and 10.

cheers,
-roger


> Also update device tree binding information.
> 
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> ---
>  Documentation/devicetree/bindings/usb/omap-usb.txt |    4 ++++
>  drivers/usb/dwc3/dwc3-omap.c                       |   13 +++++++++++++
>  2 files changed, 17 insertions(+), 0 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/usb/omap-usb.txt b/Documentation/devicetree/bindings/usb/omap-usb.txt
> index f67573c..47c8530 100644
> --- a/Documentation/devicetree/bindings/usb/omap-usb.txt
> +++ b/Documentation/devicetree/bindings/usb/omap-usb.txt
> @@ -47,6 +47,8 @@ OMAP DWC3 GLUE
>   - #address-cells, #size-cells : Must be present if the device has sub-nodes
>   - utmi-mode : controls the source of UTMI/PIPE status for VBUS and OTG ID.
>     It should be set to "1" for HW mode and "2" for SW mode.
> + - clock : should refer to the clock node that provides 960MHz functional clock.
> + - clock-names : should be "usb_otg_ss_refclk960m"
>   - ranges: the child address space are mapped 1:1 onto the parent address space
>  
>  Optional Properties:
> @@ -68,6 +70,8 @@ omap_dwc3 {
>  	#address-cells = <1>;
>  	#size-cells = <1>;
>  	utmi-mode = <2>;
> +	clocks = <&usb_otg_ss1_refclk960m>;
> +	clock-names = "usb_otg_ss_refclk960m";
>  	ranges;
>  };
>  
> diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
> index 7f7ea62..c33b26c 100644
> --- a/drivers/usb/dwc3/dwc3-omap.c
> +++ b/drivers/usb/dwc3/dwc3-omap.c
> @@ -32,6 +32,7 @@
>  #include <linux/extcon.h>
>  #include <linux/extcon/of_extcon.h>
>  #include <linux/regulator/consumer.h>
> +#include <linux/clk.h>
>  
>  #include <linux/usb/otg.h>
>  
> @@ -119,6 +120,8 @@
>  #define USBOTGSS_UTMI_OTG_STATUS_SESSVALID	(1 << 2)
>  #define USBOTGSS_UTMI_OTG_STATUS_VBUSVALID	(1 << 1)
>  
> +#define USBOTGSS_REFCLK "usb_otg_ss_refclk960m"
> +
>  struct dwc3_omap {
>  	/* device lock */
>  	spinlock_t		lock;
> @@ -144,6 +147,7 @@ struct dwc3_omap {
>  	struct notifier_block	id_nb;
>  
>  	struct regulator	*vbus_reg;
> +	struct clk		*refclk;
>  };
>  
>  enum omap_dwc3_vbus_id_status {
> @@ -449,6 +453,12 @@ static int dwc3_omap_probe(struct platform_device *pdev)
>  		}
>  	}
>  
> +	omap->refclk = devm_clk_get(dev, USBOTGSS_REFCLK);
> +	if (IS_ERR(omap->refclk)) {
> +		dev_err(dev, "couldn't get %s\n", USBOTGSS_REFCLK);
> +		return PTR_ERR(omap->refclk);
> +	}
> +
>  	spin_lock_init(&omap->lock);
>  
>  	omap->dev	= dev;
> @@ -464,6 +474,8 @@ static int dwc3_omap_probe(struct platform_device *pdev)
>  		goto err0;
>  	}
>  
> +	clk_prepare_enable(omap->refclk);
> +
>  	reg = dwc3_omap_readl(omap->base, USBOTGSS_REVISION);
>  	omap->revision = reg;
>  	x_major = USBOTGSS_REVISION_XMAJOR(reg);
> @@ -593,6 +605,7 @@ static int dwc3_omap_remove(struct platform_device *pdev)
>  		extcon_unregister_interest(&omap->extcon_id_dev);
>  	dwc3_omap_disable_irqs(omap);
>  	pm_runtime_put_sync(&pdev->dev);
> +	clk_disable_unprepare(omap->refclk);
>  	pm_runtime_disable(&pdev->dev);
>  	device_for_each_child(&pdev->dev, NULL, dwc3_omap_remove_core);
>  
> 

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Felipe Balbi Oct. 2, 2013, 1:11 p.m. UTC | #2
On Mon, Sep 23, 2013 at 04:11:30PM +0300, Roger Quadros wrote:
> Hi Felipe,
> 
> On 09/18/2013 03:49 PM, Roger Quadros wrote:
> > "usb_otg_ss_refclk960m" is an optional functional clock to the
> > UBS_OTG_SS module. So manage it in the driver.
> > 
> 
> Just realized that "usb_otg_ss_refclk960m" is in fact functional clock to the 
> PHY and not USB_OTG_SS module. The name is misleading.
> 
> So please ignore patch 9 and 10.

ignored. All others are fine, right ?
Roger Quadros Oct. 2, 2013, 1:41 p.m. UTC | #3
On 10/02/2013 04:11 PM, Felipe Balbi wrote:
> On Mon, Sep 23, 2013 at 04:11:30PM +0300, Roger Quadros wrote:
>> Hi Felipe,
>>
>> On 09/18/2013 03:49 PM, Roger Quadros wrote:
>>> "usb_otg_ss_refclk960m" is an optional functional clock to the
>>> UBS_OTG_SS module. So manage it in the driver.
>>>
>>
>> Just realized that "usb_otg_ss_refclk960m" is in fact functional clock to the 
>> PHY and not USB_OTG_SS module. The name is misleading.
>>
>> So please ignore patch 9 and 10.
> 
> ignored. All others are fine, right ?
> 
Yes. But I might have to rebase this on top of Phy framework stuff.

cheers,
-roger
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Felipe Balbi Oct. 3, 2013, 12:29 p.m. UTC | #4
Hi,

On Wed, Oct 02, 2013 at 04:41:53PM +0300, Roger Quadros wrote:
> On 10/02/2013 04:11 PM, Felipe Balbi wrote:
> > On Mon, Sep 23, 2013 at 04:11:30PM +0300, Roger Quadros wrote:
> >> Hi Felipe,
> >>
> >> On 09/18/2013 03:49 PM, Roger Quadros wrote:
> >>> "usb_otg_ss_refclk960m" is an optional functional clock to the
> >>> UBS_OTG_SS module. So manage it in the driver.
> >>>
> >>
> >> Just realized that "usb_otg_ss_refclk960m" is in fact functional clock to the 
> >> PHY and not USB_OTG_SS module. The name is misleading.
> >>
> >> So please ignore patch 9 and 10.
> > 
> > ignored. All others are fine, right ?
> > 
> Yes. But I might have to rebase this on top of Phy framework stuff.

alright, Greg already took the PHY framework, so maybe we need to just
give him my Acked-by and he takes the patches directly as I don't have
PYH framework.
Roger Quadros Oct. 3, 2013, 2:54 p.m. UTC | #5
On 10/03/2013 03:29 PM, Felipe Balbi wrote:
> Hi,
> 
> On Wed, Oct 02, 2013 at 04:41:53PM +0300, Roger Quadros wrote:
>> On 10/02/2013 04:11 PM, Felipe Balbi wrote:
>>> On Mon, Sep 23, 2013 at 04:11:30PM +0300, Roger Quadros wrote:
>>>> Hi Felipe,
>>>>
>>>> On 09/18/2013 03:49 PM, Roger Quadros wrote:
>>>>> "usb_otg_ss_refclk960m" is an optional functional clock to the
>>>>> UBS_OTG_SS module. So manage it in the driver.
>>>>>
>>>>
>>>> Just realized that "usb_otg_ss_refclk960m" is in fact functional clock to the 
>>>> PHY and not USB_OTG_SS module. The name is misleading.
>>>>
>>>> So please ignore patch 9 and 10.
>>>
>>> ignored. All others are fine, right ?
>>>
>> Yes. But I might have to rebase this on top of Phy framework stuff.
> 
> alright, Greg already took the PHY framework, so maybe we need to just
> give him my Acked-by and he takes the patches directly as I don't have
> PYH framework.
> 
OK. I'll resend this series to Greg in a while.

cheers,
-roger
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Greg KH Oct. 3, 2013, 3:41 p.m. UTC | #6
On Thu, Oct 03, 2013 at 05:54:14PM +0300, Roger Quadros wrote:
> On 10/03/2013 03:29 PM, Felipe Balbi wrote:
> > Hi,
> > 
> > On Wed, Oct 02, 2013 at 04:41:53PM +0300, Roger Quadros wrote:
> >> On 10/02/2013 04:11 PM, Felipe Balbi wrote:
> >>> On Mon, Sep 23, 2013 at 04:11:30PM +0300, Roger Quadros wrote:
> >>>> Hi Felipe,
> >>>>
> >>>> On 09/18/2013 03:49 PM, Roger Quadros wrote:
> >>>>> "usb_otg_ss_refclk960m" is an optional functional clock to the
> >>>>> UBS_OTG_SS module. So manage it in the driver.
> >>>>>
> >>>>
> >>>> Just realized that "usb_otg_ss_refclk960m" is in fact functional clock to the 
> >>>> PHY and not USB_OTG_SS module. The name is misleading.
> >>>>
> >>>> So please ignore patch 9 and 10.
> >>>
> >>> ignored. All others are fine, right ?
> >>>
> >> Yes. But I might have to rebase this on top of Phy framework stuff.
> > 
> > alright, Greg already took the PHY framework, so maybe we need to just
> > give him my Acked-by and he takes the patches directly as I don't have
> > PYH framework.
> > 
> OK. I'll resend this series to Greg in a while.

It looks like you did, but forgot Felipe's ack :(
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Roger Quadros Oct. 4, 2013, 10:46 a.m. UTC | #7
Greg,

On 10/03/2013 06:41 PM, Greg KH wrote:
> On Thu, Oct 03, 2013 at 05:54:14PM +0300, Roger Quadros wrote:
>> On 10/03/2013 03:29 PM, Felipe Balbi wrote:
>>> Hi,
>>>
>>> On Wed, Oct 02, 2013 at 04:41:53PM +0300, Roger Quadros wrote:
>>>> On 10/02/2013 04:11 PM, Felipe Balbi wrote:
>>>>> On Mon, Sep 23, 2013 at 04:11:30PM +0300, Roger Quadros wrote:
>>>>>> Hi Felipe,
>>>>>>
>>>>>> On 09/18/2013 03:49 PM, Roger Quadros wrote:
>>>>>>> "usb_otg_ss_refclk960m" is an optional functional clock to the
>>>>>>> UBS_OTG_SS module. So manage it in the driver.
>>>>>>>
>>>>>>
>>>>>> Just realized that "usb_otg_ss_refclk960m" is in fact functional clock to the 
>>>>>> PHY and not USB_OTG_SS module. The name is misleading.
>>>>>>
>>>>>> So please ignore patch 9 and 10.
>>>>>
>>>>> ignored. All others are fine, right ?
>>>>>
>>>> Yes. But I might have to rebase this on top of Phy framework stuff.
>>>
>>> alright, Greg already took the PHY framework, so maybe we need to just
>>> give him my Acked-by and he takes the patches directly as I don't have
>>> PYH framework.
>>>
>> OK. I'll resend this series to Greg in a while.
> 
> It looks like you did, but forgot Felipe's ack :(
> 
I was under the impression that Felipe will explicitly give his Ack there.
Should I resend with his Acked-bys?

cheers,
-roger
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Greg KH Oct. 4, 2013, 1:23 p.m. UTC | #8
On Fri, Oct 04, 2013 at 01:46:08PM +0300, Roger Quadros wrote:
> Greg,
> 
> On 10/03/2013 06:41 PM, Greg KH wrote:
> > On Thu, Oct 03, 2013 at 05:54:14PM +0300, Roger Quadros wrote:
> >> On 10/03/2013 03:29 PM, Felipe Balbi wrote:
> >>> Hi,
> >>>
> >>> On Wed, Oct 02, 2013 at 04:41:53PM +0300, Roger Quadros wrote:
> >>>> On 10/02/2013 04:11 PM, Felipe Balbi wrote:
> >>>>> On Mon, Sep 23, 2013 at 04:11:30PM +0300, Roger Quadros wrote:
> >>>>>> Hi Felipe,
> >>>>>>
> >>>>>> On 09/18/2013 03:49 PM, Roger Quadros wrote:
> >>>>>>> "usb_otg_ss_refclk960m" is an optional functional clock to the
> >>>>>>> UBS_OTG_SS module. So manage it in the driver.
> >>>>>>>
> >>>>>>
> >>>>>> Just realized that "usb_otg_ss_refclk960m" is in fact functional clock to the 
> >>>>>> PHY and not USB_OTG_SS module. The name is misleading.
> >>>>>>
> >>>>>> So please ignore patch 9 and 10.
> >>>>>
> >>>>> ignored. All others are fine, right ?
> >>>>>
> >>>> Yes. But I might have to rebase this on top of Phy framework stuff.
> >>>
> >>> alright, Greg already took the PHY framework, so maybe we need to just
> >>> give him my Acked-by and he takes the patches directly as I don't have
> >>> PYH framework.
> >>>
> >> OK. I'll resend this series to Greg in a while.
> > 
> > It looks like you did, but forgot Felipe's ack :(
> > 
> I was under the impression that Felipe will explicitly give his Ack there.
> Should I resend with his Acked-bys?

No need, I took the patches yesterday, you should have seen the
automated emails, right?

greg k-h
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Roger Quadros Oct. 7, 2013, 8:19 a.m. UTC | #9
On 10/04/2013 04:23 PM, Greg KH wrote:
> On Fri, Oct 04, 2013 at 01:46:08PM +0300, Roger Quadros wrote:
>> Greg,
>>
>> On 10/03/2013 06:41 PM, Greg KH wrote:
>>> On Thu, Oct 03, 2013 at 05:54:14PM +0300, Roger Quadros wrote:
>>>> On 10/03/2013 03:29 PM, Felipe Balbi wrote:
>>>>> Hi,
>>>>>
>>>>> On Wed, Oct 02, 2013 at 04:41:53PM +0300, Roger Quadros wrote:
>>>>>> On 10/02/2013 04:11 PM, Felipe Balbi wrote:
>>>>>>> On Mon, Sep 23, 2013 at 04:11:30PM +0300, Roger Quadros wrote:
>>>>>>>> Hi Felipe,
>>>>>>>>
>>>>>>>> On 09/18/2013 03:49 PM, Roger Quadros wrote:
>>>>>>>>> "usb_otg_ss_refclk960m" is an optional functional clock to the
>>>>>>>>> UBS_OTG_SS module. So manage it in the driver.
>>>>>>>>>
>>>>>>>>
>>>>>>>> Just realized that "usb_otg_ss_refclk960m" is in fact functional clock to the 
>>>>>>>> PHY and not USB_OTG_SS module. The name is misleading.
>>>>>>>>
>>>>>>>> So please ignore patch 9 and 10.
>>>>>>>
>>>>>>> ignored. All others are fine, right ?
>>>>>>>
>>>>>> Yes. But I might have to rebase this on top of Phy framework stuff.
>>>>>
>>>>> alright, Greg already took the PHY framework, so maybe we need to just
>>>>> give him my Acked-by and he takes the patches directly as I don't have
>>>>> PYH framework.
>>>>>
>>>> OK. I'll resend this series to Greg in a while.
>>>
>>> It looks like you did, but forgot Felipe's ack :(
>>>
>> I was under the impression that Felipe will explicitly give his Ack there.
>> Should I resend with his Acked-bys?
> 
> No need, I took the patches yesterday, you should have seen the
> automated emails, right?
> 
Thanks. Yes, I got the automated e-mails.

cheers,
-roger
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diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/usb/omap-usb.txt b/Documentation/devicetree/bindings/usb/omap-usb.txt
index f67573c..47c8530 100644
--- a/Documentation/devicetree/bindings/usb/omap-usb.txt
+++ b/Documentation/devicetree/bindings/usb/omap-usb.txt
@@ -47,6 +47,8 @@  OMAP DWC3 GLUE
  - #address-cells, #size-cells : Must be present if the device has sub-nodes
  - utmi-mode : controls the source of UTMI/PIPE status for VBUS and OTG ID.
    It should be set to "1" for HW mode and "2" for SW mode.
+ - clock : should refer to the clock node that provides 960MHz functional clock.
+ - clock-names : should be "usb_otg_ss_refclk960m"
  - ranges: the child address space are mapped 1:1 onto the parent address space
 
 Optional Properties:
@@ -68,6 +70,8 @@  omap_dwc3 {
 	#address-cells = <1>;
 	#size-cells = <1>;
 	utmi-mode = <2>;
+	clocks = <&usb_otg_ss1_refclk960m>;
+	clock-names = "usb_otg_ss_refclk960m";
 	ranges;
 };
 
diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
index 7f7ea62..c33b26c 100644
--- a/drivers/usb/dwc3/dwc3-omap.c
+++ b/drivers/usb/dwc3/dwc3-omap.c
@@ -32,6 +32,7 @@ 
 #include <linux/extcon.h>
 #include <linux/extcon/of_extcon.h>
 #include <linux/regulator/consumer.h>
+#include <linux/clk.h>
 
 #include <linux/usb/otg.h>
 
@@ -119,6 +120,8 @@ 
 #define USBOTGSS_UTMI_OTG_STATUS_SESSVALID	(1 << 2)
 #define USBOTGSS_UTMI_OTG_STATUS_VBUSVALID	(1 << 1)
 
+#define USBOTGSS_REFCLK "usb_otg_ss_refclk960m"
+
 struct dwc3_omap {
 	/* device lock */
 	spinlock_t		lock;
@@ -144,6 +147,7 @@  struct dwc3_omap {
 	struct notifier_block	id_nb;
 
 	struct regulator	*vbus_reg;
+	struct clk		*refclk;
 };
 
 enum omap_dwc3_vbus_id_status {
@@ -449,6 +453,12 @@  static int dwc3_omap_probe(struct platform_device *pdev)
 		}
 	}
 
+	omap->refclk = devm_clk_get(dev, USBOTGSS_REFCLK);
+	if (IS_ERR(omap->refclk)) {
+		dev_err(dev, "couldn't get %s\n", USBOTGSS_REFCLK);
+		return PTR_ERR(omap->refclk);
+	}
+
 	spin_lock_init(&omap->lock);
 
 	omap->dev	= dev;
@@ -464,6 +474,8 @@  static int dwc3_omap_probe(struct platform_device *pdev)
 		goto err0;
 	}
 
+	clk_prepare_enable(omap->refclk);
+
 	reg = dwc3_omap_readl(omap->base, USBOTGSS_REVISION);
 	omap->revision = reg;
 	x_major = USBOTGSS_REVISION_XMAJOR(reg);
@@ -593,6 +605,7 @@  static int dwc3_omap_remove(struct platform_device *pdev)
 		extcon_unregister_interest(&omap->extcon_id_dev);
 	dwc3_omap_disable_irqs(omap);
 	pm_runtime_put_sync(&pdev->dev);
+	clk_disable_unprepare(omap->refclk);
 	pm_runtime_disable(&pdev->dev);
 	device_for_each_child(&pdev->dev, NULL, dwc3_omap_remove_core);