From patchwork Wed Oct 9 15:30:49 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 3009631 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 82071BF924 for ; Wed, 9 Oct 2013 15:34:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5BBCD20263 for ; Wed, 9 Oct 2013 15:34:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C7F3920260 for ; Wed, 9 Oct 2013 15:34:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755286Ab3JIPd4 (ORCPT ); Wed, 9 Oct 2013 11:33:56 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:52485 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753165Ab3JIPdz (ORCPT ); Wed, 9 Oct 2013 11:33:55 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id r99FX57G023045; Wed, 9 Oct 2013 10:33:05 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id r99FX5t0008868; Wed, 9 Oct 2013 10:33:05 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.2.342.3; Wed, 9 Oct 2013 10:33:05 -0500 Received: from sokoban.tieu.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id r99FW0aL007684; Wed, 9 Oct 2013 10:33:03 -0500 From: Tero Kristo To: , , , , , , CC: , , J Keerthy Subject: [PATCHv8 18/36] ARM: dts: DRA7: Change apll_pcie_m2_ck to fixed factor clock Date: Wed, 9 Oct 2013 18:30:49 +0300 Message-ID: <1381332668-962-19-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1381332668-962-1-git-send-email-t-kristo@ti.com> References: <1381332668-962-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: J Keerthy This patch changes apll_pcie_m2_ck to fixed factor clock as there are no configurable divider associated to m2. Signed-off-by: J Keerthy Signed-off-by: Tero Kristo Tested-by: Nishanth Menon Acked-by: Tony Lindgren --- arch/arm/boot/dts/dra7xx-clocks.dtsi | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi index c830e15..75d5e1b 100644 --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi @@ -348,13 +348,10 @@ apll_pcie_clkvcoldo_div: apll_pcie_clkvcoldo_div { apll_pcie_m2_ck: apll_pcie_m2_ck@4a008224 { #clock-cells = <0>; - compatible = "ti,divider-clock"; + compatible = "fixed-factor-clock"; clocks = <&apll_pcie_ck>; - ti,max-div = <127>; - ti,autoidle-shift = <8>; - reg = <0x4a008224 0x4>; - ti,index-starts-at-one; - ti,autoidle-low; + clock-mult = <1>; + clock-div = <1>; }; sys_clk1_dclk_div: sys_clk1_dclk_div@4ae061c8 {