From patchwork Tue Nov 26 08:05:42 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 3237411 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 0077D9F810 for ; Tue, 26 Nov 2013 08:08:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CCD5B20398 for ; Tue, 26 Nov 2013 08:08:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6190320395 for ; Tue, 26 Nov 2013 08:08:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752962Ab3KZIIj (ORCPT ); Tue, 26 Nov 2013 03:08:39 -0500 Received: from bear.ext.ti.com ([192.94.94.41]:53577 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752763Ab3KZIIf (ORCPT ); Tue, 26 Nov 2013 03:08:35 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id rAQ8894D009335; Tue, 26 Nov 2013 02:08:09 -0600 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id rAQ888ZJ025219; Tue, 26 Nov 2013 02:08:09 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Tue, 26 Nov 2013 02:08:07 -0600 Received: from sokoban.tieu.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id rAQ8826l004524; Tue, 26 Nov 2013 02:08:06 -0600 From: Tero Kristo To: , , , , , , CC: , Subject: [PATCHv10 01/41] clk: add support for platform specific clock I/O wrapper functions Date: Tue, 26 Nov 2013 10:05:42 +0200 Message-ID: <1385453182-24421-2-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1385453182-24421-1-git-send-email-t-kristo@ti.com> References: <1385453182-24421-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Current clock wrappers assume simple and direct mapped hardware register access. Improve this support by adding functionality for registering platform specific clock I/O wrappers, which can be used to support various features needed like endianess conversions, indexed regmap support, etc. Default I/O wrapper provided also which uses the existing direct I/O mapped behavior. Signed-off-by: Tero Kristo --- drivers/clk/clk.c | 68 ++++++++++++++++++++++++++++++++++++++++++ include/linux/clk-provider.h | 15 +++++----- 2 files changed, 75 insertions(+), 8 deletions(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 2cf2ea6..c331386 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -34,6 +34,74 @@ static HLIST_HEAD(clk_root_list); static HLIST_HEAD(clk_orphan_list); static LIST_HEAD(clk_notifier_list); +/** + * clk_readl_default - default clock register read support function + * @reg: register to read + * + * Default implementation for reading a clock register. + */ +static u32 clk_readl_default(u32 __iomem *reg) +{ + return readl(reg); +} + +/** + * clk_writel_default - default clock register write support function + * @val: value to write + * @reg: register to write to + * + * Default implementation for writing a clock register. + */ +static void clk_writel_default(u32 val, u32 __iomem *reg) +{ + writel(val, reg); +} + +struct clk_reg_ops clk_reg_ops_default = { + .clk_readl = clk_readl_default, + .clk_writel = clk_writel_default +}; + +static struct clk_reg_ops *clk_reg_ops = &clk_reg_ops_default; + +/** + * clk_register_reg_ops - register access functions for clock registers + * @ops: register level ops + * + * Registers platform or SoC specific operations for reading / writing + * clock registers. + */ +int clk_register_reg_ops(struct clk_reg_ops *ops) +{ + if (!ops) + return -EINVAL; + clk_reg_ops = ops; + return 0; +} + +/** + * clk_readl - read a clock register value from hardware + * @reg: register to read + * + * Uses the registered clk_reg_ops to read a hardware clock register value. + */ +u32 clk_readl(u32 __iomem *reg) +{ + return clk_reg_ops->clk_readl(reg); +} + +/** + * clk_writel - write a clock register value to hardware + * @val: value to write + * @reg: register to write + * + * Uses the registered clk_reg_ops to write a hardware clock register value. + */ +void clk_writel(u32 val, u32 __iomem *reg) +{ + clk_reg_ops->clk_writel(val, reg); +} + /*** locking ***/ static void clk_prepare_lock(void) { diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 7e59253..16e4df2 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -512,15 +512,14 @@ static inline const char *of_clk_get_parent_name(struct device_node *np, * for improved portability across platforms */ -static inline u32 clk_readl(u32 __iomem *reg) -{ - return readl(reg); -} +struct clk_reg_ops { + u32 (*clk_readl)(u32 __iomem *reg); + void (*clk_writel)(u32 val, u32 __iomem *reg); +}; -static inline void clk_writel(u32 val, u32 __iomem *reg) -{ - writel(val, reg); -} +u32 clk_readl(u32 __iomem *reg); +void clk_writel(u32 val, u32 __iomem *reg); +int clk_register_reg_ops(struct clk_reg_ops *ops); #endif /* CONFIG_COMMON_CLK */ #endif /* CLK_PROVIDER_H */