From patchwork Tue Nov 26 08:06:12 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 3237741 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A96E19F3AE for ; Tue, 26 Nov 2013 08:10:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8081A20394 for ; Tue, 26 Nov 2013 08:10:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4CF1120386 for ; Tue, 26 Nov 2013 08:10:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754854Ab3KZIKh (ORCPT ); Tue, 26 Nov 2013 03:10:37 -0500 Received: from comal.ext.ti.com ([198.47.26.152]:47876 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754812Ab3KZIKe (ORCPT ); Tue, 26 Nov 2013 03:10:34 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id rAQ89Rb0005003; Tue, 26 Nov 2013 02:09:27 -0600 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id rAQ89RxC011663; Tue, 26 Nov 2013 02:09:27 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.2.342.3; Tue, 26 Nov 2013 02:09:27 -0600 Received: from sokoban.tieu.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id rAQ8827H004524; Tue, 26 Nov 2013 02:09:25 -0600 From: Tero Kristo To: , , , , , , CC: , Subject: [PATCHv10 31/41] ARM: OMAP2+: clock: add support for regmap Date: Tue, 26 Nov 2013 10:06:12 +0200 Message-ID: <1385453182-24421-32-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1385453182-24421-1-git-send-email-t-kristo@ti.com> References: <1385453182-24421-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Using regmap is required for isolating the actual memory access from the clock code. Now, the driver providing the support for the clock IP block can provide a regmap for this purpose. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/clock.c | 27 ++++++++++++++++++++++++++- arch/arm/mach-omap2/clock.h | 3 +++ 2 files changed, 29 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 238be3f..1ef6df8 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -25,7 +25,7 @@ #include #include #include - +#include #include @@ -56,6 +56,31 @@ u16 cpu_mask; static bool clkdm_control = true; static LIST_HEAD(clk_hw_omap_clocks); +struct regmap *clk_regmaps[CLK_MAX_REGMAPS]; + +void omap2_clk_writel(u32 val, struct clk_hw_omap *clk, void __iomem *reg) +{ + if (clk->flags & REGMAP_ADDRESSING) { + struct clk_omap_reg *r = (struct clk_omap_reg *)® + regmap_write(clk_regmaps[r->index], r->offset, val); + } else { + __raw_writel(val, reg); + } +} + +u32 omap2_clk_readl(struct clk_hw_omap *clk, void __iomem *reg) +{ + u32 val; + + if (clk->flags & REGMAP_ADDRESSING) { + struct clk_omap_reg *r = (struct clk_omap_reg *)® + regmap_read(clk_regmaps[r->index], r->offset, &val); + } else { + val = __raw_readl(reg); + } + + return val; +} /* * Used for clocks that have the same value as the parent clock, diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index cbe5ff7..9595d72 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -254,6 +254,9 @@ void omap2_clk_print_new_rates(const char *hfclkin_ck_name, const char *core_ck_name, const char *mpu_ck_name); +u32 omap2_clk_readl(struct clk_hw_omap *clk, void __iomem *reg); +void omap2_clk_writel(u32 val, struct clk_hw_omap *clk, void __iomem *reg); + extern u16 cpu_mask; extern const struct clkops clkops_omap2_dflt_wait;