From patchwork Thu Dec 19 11:23:37 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 3376851 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9020F9F384 for ; Thu, 19 Dec 2013 11:25:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BDEF620627 for ; Thu, 19 Dec 2013 11:25:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0FCEF2063E for ; Thu, 19 Dec 2013 11:25:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753264Ab3LSLZU (ORCPT ); Thu, 19 Dec 2013 06:25:20 -0500 Received: from bear.ext.ti.com ([192.94.94.41]:49916 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752852Ab3LSLZS (ORCPT ); Thu, 19 Dec 2013 06:25:18 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id rBJBOrnN004495; Thu, 19 Dec 2013 05:24:53 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id rBJBOrWo014891; Thu, 19 Dec 2013 05:24:53 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.2.342.3; Thu, 19 Dec 2013 05:24:52 -0600 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id rBJBOUh0009888; Thu, 19 Dec 2013 05:24:50 -0600 From: Tero Kristo To: , , , , , , CC: , Subject: [PATCHv11 06/49] clk: add support for low level register ops Date: Thu, 19 Dec 2013 13:23:37 +0200 Message-ID: <1387452260-23276-7-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1387452260-23276-1-git-send-email-t-kristo@ti.com> References: <1387452260-23276-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Low level register ops are needed for providing SoC or IP block specific access routines to clock registers. Subsequent patches add support for the low level ops for the individual clock drivers. Signed-off-by: Tero Kristo --- drivers/clk/clk.c | 28 ++++++++++++++++++++++++++++ include/linux/clk-provider.h | 13 +++++++++++++ 2 files changed, 41 insertions(+) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 29281f6..23a742b 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -34,6 +34,34 @@ static HLIST_HEAD(clk_root_list); static HLIST_HEAD(clk_orphan_list); static LIST_HEAD(clk_notifier_list); +/** + * clk_readl_default - default clock register read support function + * @reg: register to read + * + * Default implementation for reading a clock register. + */ +static u32 clk_readl_default(u32 __iomem *reg) +{ + return readl(reg); +} + +/** + * clk_writel_default - default clock register write support function + * @val: value to write + * @reg: register to write to + * + * Default implementation for writing a clock register. + */ +static void clk_writel_default(u32 val, u32 __iomem *reg) +{ + writel(val, reg); +} + +struct clk_ll_ops clk_ll_ops_default = { + .clk_readl = clk_readl_default, + .clk_writel = clk_writel_default +}; + /*** locking ***/ static void clk_prepare_lock(void) { diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 27a9765..cc5bee0 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -199,6 +199,24 @@ struct clk_hw { const struct clk_init_data *init; }; +/** + * struct clk_ll_ops - low-level register access ops for a clock + * + * @clk_readl: pointer to register read function + * @clk_writel: pointer to register write function + * + * Low-level register access ops are generally used by the basic clock types + * (clk-gate, clk-mux, clk-divider etc.) to provide support for various + * low-level hardware interfaces (direct MMIO, regmap etc.), but can also be + * used by other hardware-specific clock drivers if needed. + */ +struct clk_ll_ops { + u32 (*clk_readl)(u32 __iomem *reg); + void (*clk_writel)(u32 val, u32 __iomem *reg); +}; + +extern struct clk_ll_ops clk_ll_ops_default; + /* * DOC: Basic clock implementations common to many platforms *