From patchwork Fri Dec 20 16:34:24 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 3389851 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2E9319F37A for ; Fri, 20 Dec 2013 16:35:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8C4C6206E5 for ; Fri, 20 Dec 2013 16:35:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5B80C206DE for ; Fri, 20 Dec 2013 16:35:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755928Ab3LTQfb (ORCPT ); Fri, 20 Dec 2013 11:35:31 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:51652 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755789Ab3LTQf3 (ORCPT ); Fri, 20 Dec 2013 11:35:29 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id rBKGZ24C013562; Fri, 20 Dec 2013 10:35:02 -0600 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id rBKGZ2N0008770; Fri, 20 Dec 2013 10:35:02 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Fri, 20 Dec 2013 10:35:01 -0600 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id rBKGYh6a031953; Fri, 20 Dec 2013 10:34:59 -0600 From: Tero Kristo To: , , , , , , CC: , Subject: [PATCHv12 06/49] clk: add support for low level register ops Date: Fri, 20 Dec 2013 18:34:24 +0200 Message-ID: <1387557274-22583-6-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1387557274-22583-1-git-send-email-t-kristo@ti.com> References: <1387557274-22583-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Low level register ops are needed for providing SoC or IP block specific access routines to clock registers. Subsequent patches add support for the low level ops for the individual clock drivers. Signed-off-by: Tero Kristo --- drivers/clk/clk.c | 28 ++++++++++++++++++++++++++++ include/linux/clk-provider.h | 17 +++++++++++++++++ 2 files changed, 45 insertions(+) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 29281f6..8bcd1e0 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -34,6 +34,34 @@ static HLIST_HEAD(clk_root_list); static HLIST_HEAD(clk_orphan_list); static LIST_HEAD(clk_notifier_list); +/** + * clk_readl_default - default clock register read support function + * @reg: register to read + * + * Default implementation for reading a clock register. + */ +static u32 clk_readl_default(void __iomem *reg) +{ + return readl(reg); +} + +/** + * clk_writel_default - default clock register write support function + * @val: value to write + * @reg: register to write to + * + * Default implementation for writing a clock register. + */ +static void clk_writel_default(u32 val, void __iomem *reg) +{ + writel(val, reg); +} + +struct clk_ll_ops clk_ll_ops_default = { + .clk_readl = clk_readl_default, + .clk_writel = clk_writel_default +}; + /*** locking ***/ static void clk_prepare_lock(void) { diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index a4f14ae..671dff4 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -198,6 +198,23 @@ struct clk_hw { const struct clk_init_data *init; }; +/** + * struct clk_ll_ops - low-level register access ops for a clock + * @clk_readl: pointer to register read function + * @clk_writel: pointer to register write function + * + * Low-level register access ops are generally used by the basic clock types + * (clk-gate, clk-mux, clk-divider etc.) to provide support for various + * low-level hardware interfaces (direct MMIO, regmap etc.), but can also be + * used by other hardware-specific clock drivers if needed. + */ +struct clk_ll_ops { + u32 (*clk_readl)(void __iomem *reg); + void (*clk_writel)(u32 val, void __iomem *reg); +}; + +extern struct clk_ll_ops clk_ll_ops_default; + /* * DOC: Basic clock implementations common to many platforms *