From patchwork Wed Apr 16 04:14:08 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lokesh Vutla X-Patchwork-Id: 3997251 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 19902BFF02 for ; Wed, 16 Apr 2014 04:14:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4D7A2201F9 for ; Wed, 16 Apr 2014 04:14:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 03859201DE for ; Wed, 16 Apr 2014 04:14:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751312AbaDPEOn (ORCPT ); Wed, 16 Apr 2014 00:14:43 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:46252 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750919AbaDPEOm (ORCPT ); Wed, 16 Apr 2014 00:14:42 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id s3G4EJQW006210; Tue, 15 Apr 2014 23:14:19 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s3G4EIGX027921; Tue, 15 Apr 2014 23:14:19 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.174.1; Tue, 15 Apr 2014 23:14:18 -0500 Received: from a0131933lt.apr.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s3G4EGlD029597; Tue, 15 Apr 2014 23:14:16 -0500 From: Lokesh Vutla To: CC: , , , , , Subject: [PATCH] ARM: AM43xx: clk: Change the wdt1 func clk src to per_32k clk Date: Wed, 16 Apr 2014 09:44:08 +0530 Message-ID: <1397621648-15691-1-git-send-email-lokeshvutla@ti.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP WDT1 module can take one of the below clocks as input functional clock - - On-Chip 32K RC Osc [default/reset] - 32K from PRCM The On-Chip 32K RC Osc clock is not an accurate clock-source as per the design/spec, so as a result, for example, timer which supposed to get expired @60Sec, but will expire somewhere ~@40Sec, which is not expected by any use-case. The solution here is to switch the input clock-source to PRCM generated 32K clock-source during boot-time itself. This is derived from AM33xx clock file. Signed-off-by: Lokesh Vutla --- drivers/clk/ti/clk-43xx.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/clk/ti/clk-43xx.c b/drivers/clk/ti/clk-43xx.c index 67c8de5..ae2524e 100644 --- a/drivers/clk/ti/clk-43xx.c +++ b/drivers/clk/ti/clk-43xx.c @@ -110,9 +110,22 @@ static struct ti_dt_clk am43xx_clks[] = { int __init am43xx_dt_clk_init(void) { + struct clk *clk1, *clk2; + ti_dt_clocks_register(am43xx_clks); omap2_clk_disable_autoidle_all(); + /* + * The On-Chip 32K RC Osc clock is not an accurate clock-source as per + * the design/spec, so as a result, for example, timer which supposed + * to get expired @60Sec, but will expire somewhere ~@40Sec, which is + * not expected by any use-case, so change WDT1 clock source to PRCM + * 32KHz clock. + */ + clk1 = clk_get_sys(NULL, "wdt1_fck"); + clk2 = clk_get_sys(NULL, "clkdiv32k_ick"); + clk_set_parent(clk1, clk2); + return 0; }