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[v2,1/4] MFD: DT bindings for the TPS65917 family MFD

Message ID 1400577099-8743-2-git-send-email-j-keerthy@ti.com (mailing list archive)
State New, archived
Headers show

Commit Message

J, KEERTHY May 20, 2014, 9:11 a.m. UTC
Add the various binding files for the TPS65917 family of chips. There is a
top level MFD binding then a seperate binding for regulators IP blocks on chips.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 Documentation/devicetree/bindings/mfd/tps65917.txt |   35 ++++++++++++++++++++
 1 file changed, 35 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/tps65917.txt
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Patch

diff --git a/Documentation/devicetree/bindings/mfd/tps65917.txt b/Documentation/devicetree/bindings/mfd/tps65917.txt
new file mode 100644
index 0000000..287a713
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/tps65917.txt
@@ -0,0 +1,35 @@ 
+* TPS65917 device tree bindings
+
+The TI TPS65917 family of PMICs.
+
+Required properties:
+- compatible : Should be from the list
+  ti,tps65917
+- interrupt-controller : TPS65917 has its own internal IRQs
+- #interrupt-cells : should be set to 2 for IRQ number and flags
+  The first cell is the IRQ number.
+  The second cell is the flags, encoded as the trigger masks from
+  Documentation/devicetree/bindings/interrupts.txt
+- interrupt-parent : The parent interrupt controller.
+
+Optional properties:
+  ti,mux-padX : set the pad register X (1-2) to the correct muxing for the
+		hardware, if not set will use muxing in OTP.
+
+Example:
+
+tps65917 {
+	compatible = "ti,tps65917";
+	reg = <0x58>
+	interrupt-parent = <&intc>;
+	interrupt-controller;
+	#interrupt-cells = <2>;
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pmic {
+		compatible = "ti,tps65917-pmic";
+		....
+	};
+}