From patchwork Fri Jul 11 02:55:49 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gerlach X-Patchwork-Id: 4529701 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0331EBEEAA for ; Fri, 11 Jul 2014 02:58:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1AC9E201F4 for ; Fri, 11 Jul 2014 02:58:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 070A7201EC for ; Fri, 11 Jul 2014 02:58:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752443AbaGKC6B (ORCPT ); Thu, 10 Jul 2014 22:58:01 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:49022 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752409AbaGKC57 (ORCPT ); Thu, 10 Jul 2014 22:57:59 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s6B2vXd0026903; Thu, 10 Jul 2014 21:57:33 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s6B2vXwR024909; Thu, 10 Jul 2014 21:57:33 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Thu, 10 Jul 2014 21:57:33 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s6B2vXLK032420; Thu, 10 Jul 2014 21:57:33 -0500 Received: from localhost (j-172-22-132-241.vpn.ti.com [172.22.132.241]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id s6B2vWt15909; Thu, 10 Jul 2014 21:57:32 -0500 (CDT) From: Dave Gerlach To: , CC: Paul Walmsley , Kevin Hilman , Tony Lindgren , Tero Kristo , Nishanth Menon , Russ Dill , Santosh Shilimkar , Daniel Mack , Suman Anna , Benoit Cousson , Dave Gerlach Subject: [PATCH v4 11/11] ARM: OMAP2+: AM33XX: Hookup AM33XX PM code into OMAP builds Date: Thu, 10 Jul 2014 21:55:49 -0500 Message-ID: <1405047349-15101-12-git-send-email-d-gerlach@ti.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1405047349-15101-1-git-send-email-d-gerlach@ti.com> References: <1405047349-15101-1-git-send-email-d-gerlach@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP With all the requisite changes in place we can now enable the basic PM support for AM33xx. This patch updates the various OMAP files to enable suspend-resume on AM33xx. Because the suspend resume functionality is different on AM33xx than other OMAP platforms due to the need for M3 firmware and an IPC channel to be in place, separate PM ops are used instead of omap_pm_ops. These are now set using omap2_common_suspend_init so the AM33xx can make a decision at runtime to enable suspend based on the availabilty of aforementioned requirements. Signed-off-by: Dave Gerlach --- v3->v4: Updated for rproc usage now. arch/arm/mach-omap2/Kconfig | 1 + arch/arm/mach-omap2/Makefile | 2 ++ arch/arm/mach-omap2/common.h | 9 +++++++++ arch/arm/mach-omap2/io.c | 1 + arch/arm/mach-omap2/pm.h | 5 +++++ arch/arm/mach-omap2/sram.c | 10 +++++++++- arch/arm/mach-omap2/sram.h | 2 ++ 7 files changed, 29 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 1c1ed73..f8a56e5 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -59,6 +59,7 @@ config SOC_AM33XX select ARCH_OMAP2PLUS select ARCH_HAS_OPP select ARM_CPU_SUSPEND if PM + select WKUP_M3_RPROC if PM config SOC_AM43XX bool "TI AM43x" diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 8ca99e9..3c8d30c 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -90,6 +90,7 @@ obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o omap-mpuss-lowpower.o obj-$(CONFIG_SOC_OMAP5) += omap-mpuss-lowpower.o obj-$(CONFIG_SOC_DRA7XX) += omap-mpuss-lowpower.o +obj-$(CONFIG_SOC_AM33XX) += pm33xx.o sleep33xx.o obj-$(CONFIG_PM_DEBUG) += pm-debug.o obj-$(CONFIG_POWER_AVS_OMAP) += sr_device.o @@ -97,6 +98,7 @@ obj-$(CONFIG_POWER_AVS_OMAP_CLASS3) += smartreflex-class3.o AFLAGS_sleep24xx.o :=-Wa,-march=armv6 AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a$(plus_sec) +AFLAGS_sleep33xx.o :=-Wa,-march=armv7-a$(plus_sec) endif diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 1536338..1bcd475 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -75,6 +75,15 @@ static inline int omap4_pm_init_early(void) } #endif +#if defined(CONFIG_PM) && defined(CONFIG_SOC_AM33XX) +int am33xx_pm_init(void); +#else +static inline int am33xx_pm_init(void) +{ + return 0; +} +#endif + #ifdef CONFIG_OMAP_MUX int omap_mux_late_init(void); #else diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 4d4d150..fb23f83 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -590,6 +590,7 @@ void __init am33xx_init_early(void) void __init am33xx_init_late(void) { omap_common_late_init(); + am33xx_pm_init(); } #endif diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index e150102..b6f72a4 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -81,6 +81,11 @@ extern unsigned int omap3_do_wfi_sz; /* ... and its pointer from SRAM after copy */ extern void (*omap3_do_wfi_sram)(void); +/* am33xx_do_wfi function pointer and size, for copy to SRAM */ +extern void am33xx_do_wfi(void); +extern unsigned int am33xx_do_wfi_sz; +extern unsigned int am33xx_resume_offset; + /* save_secure_ram_context function pointer and size, for copy to SRAM */ extern int save_secure_ram_context(u32 *addr); extern unsigned int save_secure_ram_context_sz; diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c index ddf1818..2227f20 100644 --- a/arch/arm/mach-omap2/sram.c +++ b/arch/arm/mach-omap2/sram.c @@ -154,7 +154,7 @@ static void __init omap2_map_sram(void) omap_sram_size -= SZ_16K; } #endif - if (cpu_is_omap34xx()) { + if (cpu_is_omap34xx() || soc_is_am33xx()) { /* * SRAM must be marked as non-cached on OMAP3 since the * CORE DPLL M2 divider change code (in SRAM) runs with the @@ -285,10 +285,18 @@ static inline int omap34xx_sram_init(void) } #endif /* CONFIG_ARCH_OMAP3 */ +#ifdef CONFIG_SOC_AM33XX static inline int am33xx_sram_init(void) { + am33xx_push_sram_idle(); return 0; } +#else +static inline int am33xx_sram_init(void) +{ + return 0; +} +#endif int __init omap_sram_init(void) { diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h index ca7277c..24788b5 100644 --- a/arch/arm/mach-omap2/sram.h +++ b/arch/arm/mach-omap2/sram.h @@ -62,8 +62,10 @@ extern unsigned long omap3_sram_configure_core_dpll_sz; #ifdef CONFIG_PM extern void omap_push_sram_idle(void); +extern void am33xx_push_sram_idle(void); #else static inline void omap_push_sram_idle(void) {} +static inline void am33xx_push_sram_idle(void) {} #endif /* CONFIG_PM */ #endif /* __ASSEMBLY__ */