diff mbox

[RFC] dts: Add am335x-wega-rdk.dtb sources for phyBOARD-Wega-AM335x

Message ID 1425733193-12837-1-git-send-email-matwey@sai.msu.ru (mailing list archive)
State New, archived
Headers show

Commit Message

Matwey V. Kornilov March 7, 2015, 12:59 p.m. UTC
The following patch is to support Phytec phyBOARD-Wega-AM335x device.
The patch consists of the commits taken from

    git://git.phytec.de/linux-ti

and ported to upstream kernel with small modifications,
i.e. &ctrl_mod renamed to &usb_ctrl_mod.

The code has been written by the following developers:
    Christian Arlt <c.arlt@phytec.de>
    Stefan Müller-Klieser <s.mueller-klieser@phytec.de>
    Teresa Gámez <t.gamez@phytec.de>
    Wadim Egorov <w.egorov@phytec.de>

Tested-by: Matwey V. Kornilov <matwey@sai.msu.ru>
Signed-off-by: Matwey V. Kornilov <matwey@sai.msu.ru>
---
The patch has been tested on 3.19.0 with openSUSE Factory on
phyBOARD-Wega-AM335x kit. The board successfully boots, ethernet works.

 arch/arm/boot/dts/Makefile                     |   3 +-
 arch/arm/boot/dts/am335x-phycore-som.dtsi      | 275 +++++++++++++++++++++++++
 arch/arm/boot/dts/am335x-phytec-lcd-018.dtsi   | 109 ++++++++++
 arch/arm/boot/dts/am335x-wega-peb-av-01.dtsi   |  71 +++++++
 arch/arm/boot/dts/am335x-wega-peb-av-02.dtsi   |  44 ++++
 arch/arm/boot/dts/am335x-wega-peb-eval-01.dtsi |  54 +++++
 arch/arm/boot/dts/am335x-wega-rdk.dts          | 136 ++++++++++++
 arch/arm/boot/dts/am335x-wega.dtsi             | 209 +++++++++++++++++++
 8 files changed, 900 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/am335x-phycore-som.dtsi
 create mode 100644 arch/arm/boot/dts/am335x-phytec-lcd-018.dtsi
 create mode 100644 arch/arm/boot/dts/am335x-wega-peb-av-01.dtsi
 create mode 100644 arch/arm/boot/dts/am335x-wega-peb-av-02.dtsi
 create mode 100644 arch/arm/boot/dts/am335x-wega-peb-eval-01.dtsi
 create mode 100644 arch/arm/boot/dts/am335x-wega-rdk.dts
 create mode 100644 arch/arm/boot/dts/am335x-wega.dtsi

Comments

Matwey V. Kornilov March 13, 2015, 6:58 a.m. UTC | #1
Hi,

Teresa replied me, but unfortunately I found that the answer not
reached the public maillists. Briefly, we don't need this patch,
PhyTec will send better one this year.


2015-03-07 15:59 GMT+03:00 Matwey V. Kornilov <matwey@sai.msu.ru>:
> The following patch is to support Phytec phyBOARD-Wega-AM335x device.
> The patch consists of the commits taken from
>
>     git://git.phytec.de/linux-ti
>
> and ported to upstream kernel with small modifications,
> i.e. &ctrl_mod renamed to &usb_ctrl_mod.
>
> The code has been written by the following developers:
>     Christian Arlt <c.arlt@phytec.de>
>     Stefan Müller-Klieser <s.mueller-klieser@phytec.de>
>     Teresa Gámez <t.gamez@phytec.de>
>     Wadim Egorov <w.egorov@phytec.de>
>
> Tested-by: Matwey V. Kornilov <matwey@sai.msu.ru>
> Signed-off-by: Matwey V. Kornilov <matwey@sai.msu.ru>
> ---
> The patch has been tested on 3.19.0 with openSUSE Factory on
> phyBOARD-Wega-AM335x kit. The board successfully boots, ethernet works.
>
>  arch/arm/boot/dts/Makefile                     |   3 +-
>  arch/arm/boot/dts/am335x-phycore-som.dtsi      | 275 +++++++++++++++++++++++++
>  arch/arm/boot/dts/am335x-phytec-lcd-018.dtsi   | 109 ++++++++++
>  arch/arm/boot/dts/am335x-wega-peb-av-01.dtsi   |  71 +++++++
>  arch/arm/boot/dts/am335x-wega-peb-av-02.dtsi   |  44 ++++
>  arch/arm/boot/dts/am335x-wega-peb-eval-01.dtsi |  54 +++++
>  arch/arm/boot/dts/am335x-wega-rdk.dts          | 136 ++++++++++++
>  arch/arm/boot/dts/am335x-wega.dtsi             | 209 +++++++++++++++++++
>  8 files changed, 900 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/boot/dts/am335x-phycore-som.dtsi
>  create mode 100644 arch/arm/boot/dts/am335x-phytec-lcd-018.dtsi
>  create mode 100644 arch/arm/boot/dts/am335x-wega-peb-av-01.dtsi
>  create mode 100644 arch/arm/boot/dts/am335x-wega-peb-av-02.dtsi
>  create mode 100644 arch/arm/boot/dts/am335x-wega-peb-eval-01.dtsi
>  create mode 100644 arch/arm/boot/dts/am335x-wega-rdk.dts
>  create mode 100644 arch/arm/boot/dts/am335x-wega.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index a1c776b..aa05ae4 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -401,7 +401,8 @@ dtb-$(CONFIG_SOC_AM33XX) += \
>         am335x-evmsk.dtb \
>         am335x-nano.dtb \
>         am335x-pepper.dtb \
> -       am335x-lxm.dtb
> +       am335x-lxm.dtb \
> +       am335x-wega-rdk.dts
>  dtb-$(CONFIG_ARCH_OMAP4) += \
>         omap4-duovero-parlor.dtb \
>         omap4-panda.dtb \
> diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi b/arch/arm/boot/dts/am335x-phycore-som.dtsi
> new file mode 100644
> index 0000000..aa7826d
> --- /dev/null
> +++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
> @@ -0,0 +1,275 @@
> +/*
> + * Copyright (C) 2014 Teresa Gámez <t.gamez@phytec.de> Phytec Messtechnik GmbH
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include "am33xx.dtsi"
> +
> +/ {
> +       model = "Phytec AM335x phyCORE";
> +       compatible = "phytec,am335x-phycore-som", "ti,am33xx";
> +
> +       aliases {
> +               rtc0 = &i2c_rtc;
> +               rtc1 = &rtc;
> +       };
> +
> +       cpus {
> +               cpu@0 {
> +                       cpu0-supply = <&vdd1_reg>;
> +               };
> +       };
> +
> +       /* This is a dummy node. Will be set by a bootloader */
> +       memory {
> +               device_type = "memory";
> +               reg = <0x80000000 0x20000000>; /* 512 MB */
> +       };
> +
> +       vcc5v: fixedregulator@0 {
> +               compatible = "regulator-fixed";
> +       };
> +};
> +
> +/* Crypto Module */
> +&aes {
> +       status = "okay";
> +};
> +
> +&sham {
> +       status = "okay";
> +};
> +
> +/* Ethernet */
> +&am33xx_pinmux {
> +       ethernet0_pins: pinmux_ethernet0 {
> +               pinctrl-single,pins = <
> +                       0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_crs.rmii1_crs_dv */
> +                       0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_rxerr.rmii1_rxerr */
> +                       0x114 (PIN_OUTPUT | MUX_MODE1)          /* mii1_txen.rmii1_txen */
> +                       0x124 (PIN_OUTPUT | MUX_MODE1)          /* mii1_txd1.rmii1_txd1 */
> +                       0x128 (PIN_OUTPUT | MUX_MODE1)          /* mii1_txd0.rmii1_txd0 */
> +                       0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_rxd1.rmii1_rxd1 */
> +                       0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_rxd0.rmii1_rxd0 */
> +                       0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* rmii1_refclk.rmii1_refclk */
> +               >;
> +       };
> +
> +       mdio_pins: pinmux_mdio {
> +               pinctrl-single,pins = <
> +                       /* MDIO */
> +                       0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
> +                       0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
> +               >;
> +       };
> +};
> +
> +&cpsw_emac0 {
> +       phy_id = <&davinci_mdio>, <0>;
> +       phy-mode = "rmii";
> +       dual_emac_res_vlan = <1>;
> +       status = "disabled";
> +};
> +
> +&cpsw_emac1 {
> +       status = "disabled";
> +};
> +
> +&davinci_mdio {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&mdio_pins>;
> +       status = "disabled";
> +};
> +
> +&mac {
> +       slaves = <1>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&ethernet0_pins>;
> +};
> +
> +&phy_sel {
> +       rmii-clock-ext;
> +};
> +
> +/* I2C Busses */
> +&am33xx_pinmux {
> +       i2c0_pins: pinmux_i2c0 {
> +               pinctrl-single,pins = <
> +                       0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
> +                       0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
> +               >;
> +       };
> +};
> +
> +&i2c0 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&i2c0_pins>;
> +       clock-frequency = <400000>;
> +       status = "okay";
> +
> +       tps: pmic@2d {
> +               reg = <0x2d>;
> +       };
> +
> +       i2c_eeprom: eeprom@52 {
> +               compatible = "at,24c32";
> +               pagesize = <32>;
> +               reg = <0x52>;
> +               status = "disabled";
> +       };
> +
> +       i2c_rtc: rtc@68 {
> +               compatible = "mc,rv4162c7";
> +               reg = <0x68>;
> +               status = "disabled";
> +       };
> +};
> +
> +/* NAND memory */
> +&am33xx_pinmux {
> +               nandflash_pins: pinmux_nandflash {
> +                       pinctrl-single,pins = <
> +                       0x0 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad0.gpmc_ad0 */
> +                       0x4 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad1.gpmc_ad1 */
> +                       0x8 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad2.gpmc_ad2 */
> +                       0xc (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad3.gpmc_ad3 */
> +                       0x10 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
> +                       0x14 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
> +                       0x18 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
> +                       0x1c (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
> +                       0x70 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_wait0.gpmc_wait0 */
> +                       0x7c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_csn0.gpmc_csn0 */
> +                       0x90 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_advn_ale.gpmc_advn_ale */
> +                       0x94 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_oen_ren.gpmc_oen_ren */
> +                       0x98 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_wen.gpmc_wen */
> +                       0x9c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_be0n_cle.gpmc_be0n_cle */
> +               >;
> +       };
> +};
> +
> +&elm {
> +       status = "okay";
> +};
> +
> +&gpmc {
> +       status = "okay";
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&nandflash_pins>;
> +       ranges = <0 0 0x08000000 0x10000000>;   /* CS0: NAND */
> +       nandflash: nand@0,0 {
> +               reg = <0 0 0>; /* CS0, offset 0 */
> +               nand-bus-width = <8>;
> +               ti,nand-ecc-opt = "bch8";
> +               gpmc,device-nand = "true";
> +               gpmc,device-width = <1>;
> +               gpmc,sync-clk-ps = <0>;
> +               gpmc,cs-on-ns = <0>;
> +               gpmc,cs-rd-off-ns = <30>;
> +               gpmc,cs-wr-off-ns = <30>;
> +               gpmc,adv-on-ns = <0>;
> +               gpmc,adv-rd-off-ns = <30>;
> +               gpmc,adv-wr-off-ns = <30>;
> +               gpmc,we-on-ns = <0>;
> +               gpmc,we-off-ns = <20>;
> +               gpmc,oe-on-ns = <10>;
> +               gpmc,oe-off-ns = <30>;
> +               gpmc,access-ns = <30>;
> +               gpmc,rd-cycle-ns = <30>;
> +               gpmc,wr-cycle-ns = <30>;
> +               gpmc,wait-on-read = "true";
> +               gpmc,wait-on-write = "true";
> +               gpmc,bus-turnaround-ns = <0>;
> +               gpmc,cycle2cycle-delay-ns = <50>;
> +               gpmc,cycle2cycle-diffcsen;
> +               gpmc,clk-activation-ns = <0>;
> +               gpmc,wait-monitoring-ns = <0>;
> +               gpmc,wr-access-ns = <30>;
> +               gpmc,wr-data-mux-bus-ns = <0>;
> +
> +               elm_id = <&elm>;
> +
> +               #address-cells = <1>;
> +               #size-cells = <1>;
> +       };
> +};
> +
> +/* Power */
> +#include "tps65910.dtsi"
> +
> +&tps {
> +       vcc1-supply = <&vcc5v>;
> +       vcc2-supply = <&vcc5v>;
> +       vcc3-supply = <&vcc5v>;
> +       vcc4-supply = <&vcc5v>;
> +       vcc5-supply = <&vcc5v>;
> +       vcc6-supply = <&vcc5v>;
> +       vcc7-supply = <&vcc5v>;
> +       vccio-supply = <&vcc5v>;
> +
> +       regulators {
> +               vdd1_reg: regulator@2 {
> +                       /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
> +                       regulator-name = "vdd_mpu";
> +                       regulator-min-microvolt = <912500>;
> +                       regulator-max-microvolt = <1312500>;
> +                       regulator-boot-on;
> +                       regulator-always-on;
> +               };
> +
> +               vdd2_reg: regulator@3 {
> +                       /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
> +                       regulator-name = "vdd_core";
> +                       regulator-min-microvolt = <912500>;
> +                       regulator-max-microvolt = <1150000>;
> +                       regulator-boot-on;
> +                       regulator-always-on;
> +               };
> +
> +               vdig1_reg: regulator@5 {
> +                       regulator-name = "vdig1_1p8v";
> +                       regulator-min-microvolt = <1800000>;
> +                       regulator-max-microvolt = <1800000>;
> +               };
> +
> +               vmmc_reg: regulator@12 {
> +                       regulator-min-microvolt = <1800000>;
> +                       regulator-max-microvolt = <3300000>;
> +               };
> +       };
> +};
> +
> +&vcc5v {
> +       regulator-name = "vcc5v";
> +       regulator-min-microvolt = <5000000>;
> +       regulator-max-microvolt = <5000000>;
> +       regulator-boot-on;
> +};
> +
> +/* SPI Busses */
> +&am33xx_pinmux {
> +       spi0_pins: pinmux_spi0 {
> +               pinctrl-single,pins = <
> +                       0x150 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* spi0_clk.spi0_clk */
> +                       0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* spi0_d0.spi0_d0 */
> +                       0x158 (PIN_INPUT_PULLUP | MUX_MODE0)    /* spi0_d1.spi0_d1 */
> +                       0x15c (PIN_INPUT_PULLUP | MUX_MODE0)    /* spi0_cs0.spi0_cs0 */
> +               >;
> +       };
> +};
> +
> +&spi0 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&spi0_pins>;
> +       status = "okay";
> +
> +       serial_flash: m25p80@0 {
> +               compatible = "m25p80";
> +               spi-max-frequency = <48000000>;
> +               reg = <0x0>;
> +               #address-cells = <1>;
> +               #size-cells = <1>;
> +       };
> +};
> diff --git a/arch/arm/boot/dts/am335x-phytec-lcd-018.dtsi b/arch/arm/boot/dts/am335x-phytec-lcd-018.dtsi
> new file mode 100644
> index 0000000..daa9b2e
> --- /dev/null
> +++ b/arch/arm/boot/dts/am335x-phytec-lcd-018.dtsi
> @@ -0,0 +1,109 @@
> +/*
> + * Copyright (C) 2014 Wadim Egorov <w.egorov@phytec.de> PHYTEC Messtechnik GmbH
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/*
> + * The board specific DTS file have to:
> + *  - Specify pwms and enable gpios for backlight
> + *  - Mux the display enable pins if available
> + *  - Create the i2c_ts node on the specific i2c bus
> +*/
> +
> +&am33xx_pinmux {
> +       lcd_pins: pinmux_lcd {
> +               pinctrl-single,pins = <
> +                       0xA0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data0.lcd_data0 */
> +                       0xA4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data1.lcd_data1 */
> +                       0xA8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data2.lcd_data2 */
> +                       0xAC (PIN_OUTPUT | MUX_MODE0)   /* lcd_data3.lcd_data3 */
> +                       0xB0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data4.lcd_data4 */
> +                       0xB4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data5.lcd_data5 */
> +                       0xB8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data6.lcd_data6 */
> +                       0xBC (PIN_OUTPUT | MUX_MODE0)   /* lcd_data7.lcd_data7 */
> +                       0xC0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data8.lcd_data8 */
> +                       0xC4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data9.lcd_data9 */
> +                       0xC8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data10.lcd_data10 */
> +                       0xCC (PIN_OUTPUT | MUX_MODE0)   /* lcd_data11.lcd_data11 */
> +                       0xD0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data12.lcd_data12 */
> +                       0xD4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data13.lcd_data13 */
> +                       0xD8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data14.lcd_data14 */
> +                       0xDC (PIN_OUTPUT | MUX_MODE0)   /* lcd_data15.lcd_data15 */
> +                       0x3C (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad15.lcd_data16 */
> +                       0x38 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad14.lcd_data17 */
> +                       0x34 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad13.lcd_data18 */
> +                       0x30 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad12.lcd_data19 */
> +                       0x2C (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad11.lcd_data20 */
> +                       0x28 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad10.lcd_data21 */
> +                       0x24 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad9.lcd_data22 */
> +                       0x20 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad8.lcd_data23 */
> +                       0xE0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_vsync.lcd_vsync */
> +                       0xE4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_hsync.lcd_hsync */
> +                       0xE8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_pclk.lcd_pclk */
> +                       0xEC (PIN_OUTPUT | MUX_MODE0)   /* lcd_ac_bias_en.lcd_ac_bias_en */
> +               >;
> +       };
> +};
> +
> +/ {
> +       backlight: backlight {
> +               compatible = "pwm-backlight";
> +               brightness-levels = <0 4 8 16 32 64 128 255>;
> +               default-brightness-level = <6>;
> +               power-supply = <&lcd_3v3>;
> +               status = "disabled";
> +       };
> +
> +       lcd_3v3: fixedregulator-lcd {
> +               compatible = "regulator-fixed";
> +               regulator-name = "lcd_3v3";
> +               regulator-min-microvolt = <3300000>;
> +               regulator-max-microvolt = <3300000>;
> +               regulator-boot-on;
> +       };
> +
> +       panel: panel {
> +               compatible = "ti,tilcdc,panel";
> +               pinctrl-names = "default";
> +               pinctrl-0 = <&lcd_pins>;
> +               status = "disabled";
> +
> +               panel-info {
> +                       ac-bias = <255>;
> +                       ac-bias-intrpt = <0>;
> +                       dma-burst-sz = <16>;
> +                       bpp = <32>;
> +                       fdd = <0x80>;
> +                       sync-edge = <0>;
> +                       sync-ctrl = <1>;
> +                       raster-order = <0>;
> +                       fifo-th = <0>;
> +                       invert-pxl-clk = <1>;
> +               };
> +
> +               display-timings {
> +                       native-mode = <&timing0>;
> +                       timing0: ETM0700G0DH6 {
> +                               clock-frequency = <40000000>;
> +                               hactive = <800>;
> +                               vactive = <480>;
> +                               hfront-porch = <40>;
> +                               hback-porch = <216>;
> +                               hsync-len = <128>;
> +                               vback-porch = <35>;
> +                               vfront-porch = <10>;
> +                               vsync-len = <2>;
> +                               hsync-active = <1>;
> +                               vsync-active = <1>;
> +                       };
> +               };
> +       };
> +};
> +
> +&i2c_ts {
> +       compatible = "edt,edt-ft5x06";
> +       reg = <0x38>;
> +};
> diff --git a/arch/arm/boot/dts/am335x-wega-peb-av-01.dtsi b/arch/arm/boot/dts/am335x-wega-peb-av-01.dtsi
> new file mode 100644
> index 0000000..503ecb3
> --- /dev/null
> +++ b/arch/arm/boot/dts/am335x-wega-peb-av-01.dtsi
> @@ -0,0 +1,71 @@
> +/*
> + * Copyright (C) 2014 Christian Arlt <c.arlt@phytec.de> Phytec Messtechnik GmbH
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/ {
> +       hdmi: hdmi {
> +               compatible = "ti,tilcdc,slave";
> +               i2c = <&i2c0>;
> +
> +               pinctrl-names = "default";
> +               pinctrl-0 = <&hdmi_pins>;
> +               status = "disabled";
> +
> +               panel-info {
> +                       /* required */
> +                       ac-bias = <255>;
> +                       ac-bias-intrpt = <0>;
> +                       dma-burst-sz = <16>;
> +                       bpp = <32>;
> +                       fdd = <16>;
> +                       sync-edge = <1>;        /* stabilizes picture   */
> +                       sync-ctrl = <1>;
> +                       raster-order = <0>;
> +                       fifo-th = <0>;
> +
> +                       /* optional */
> +                       invert-pxl-clk = <1>;
> +                       tft-alt-mode = <0>;
> +               };
> +       };
> +};
> +
> +&am33xx_pinmux {
> +       hdmi_pins: pinmux_hdmi {
> +               pinctrl-single,pins = <
> +                       0xA0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data0.lcd_data0 */
> +                       0xA4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data1.lcd_data1 */
> +                       0xA8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data2.lcd_data2 */
> +                       0xAC (PIN_OUTPUT | MUX_MODE0)   /* lcd_data3.lcd_data3 */
> +                       0xB0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data4.lcd_data4 */
> +                       0xB4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data5.lcd_data5 */
> +                       0xB8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data6.lcd_data6 */
> +                       0xBC (PIN_OUTPUT | MUX_MODE0)   /* lcd_data7.lcd_data7 */
> +                       0xC0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data8.lcd_data8 */
> +                       0xC4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data9.lcd_data9 */
> +                       0xC8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data10.lcd_data10 */
> +                       0xCC (PIN_OUTPUT | MUX_MODE0)   /* lcd_data11.lcd_data11 */
> +                       0xD0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data12.lcd_data12 */
> +                       0xD4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data13.lcd_data13 */
> +                       0xD8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data14.lcd_data14 */
> +                       0xDC (PIN_OUTPUT | MUX_MODE0)   /* lcd_data15.lcd_data15 */
> +                       0x3C (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad15.lcd_data16 */
> +                       0x38 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad14.lcd_data17 */
> +                       0x34 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad13.lcd_data18 */
> +                       0x30 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad12.lcd_data19 */
> +                       0x2C (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad11.lcd_data20 */
> +                       0x28 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad10.lcd_data21 */
> +                       0x24 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad9.lcd_data22 */
> +                       0x20 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad8.lcd_data23 */
> +                       0xE0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_vsync.lcd_vsync */
> +                       0xE4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_hsync.lcd_hsync */
> +                       0xE8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_pclk.lcd_pclk */
> +                       0xEC (PIN_OUTPUT | MUX_MODE0)   /* lcd_ac_bias_en.lcd_ac_bias_en */
> +                       0x80 (PIN_OUTPUT | MUX_MODE7)   /* gpmc_csn1.x_av_int_gpio1_30  */
> +               >;
> +       };
> +};
> diff --git a/arch/arm/boot/dts/am335x-wega-peb-av-02.dtsi b/arch/arm/boot/dts/am335x-wega-peb-av-02.dtsi
> new file mode 100644
> index 0000000..fd76760
> --- /dev/null
> +++ b/arch/arm/boot/dts/am335x-wega-peb-av-02.dtsi
> @@ -0,0 +1,44 @@
> +/*
> + * Copyright (C) 2014 Christian Arlt <c.arlt@phytec.de> Phytec Messtechnik GmbH
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +&am33xx_pinmux {
> +       ecap2_pins: backlight_pins {
> +               pinctrl-single,pins = <
> +                       0x19c (PIN_OUTPUT | MUX_MODE4)          /* mcasp0_ahclkr.ecap2_in_pwm2_out      */
> +               >;
> +       };
> +
> +       ts_irq_pin: pinmux_ts_irq {
> +               pinctrl-single,pins = <
> +                       0x80 (PIN_INPUT_PULLUP | MUX_MODE7)     /* gpmc_csn1.x_av_int_gpio1_30  */
> +               >;
> +       };
> +};
> +
> +&i2c0 {
> +       i2c_ts: touchscreen@38 {
> +               pinctrl-names = "default";
> +               pinctrl-0 = <&ts_irq_pin>;
> +               interrupt-parent = <&gpio1>;
> +               interrupts = <30 0>;
> +               status = "disabled";
> +       };
> +};
> +
> +&ecap2 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&ecap2_pins>;
> +       status = "disabled";
> +};
> +
> +#include "am335x-phytec-lcd-018.dtsi"
> +
> +&backlight {
> +       pwms = <&ecap2 0 100000 0>;
> +       enable-gpios = <&gpio3 19 0>;
> +};
> diff --git a/arch/arm/boot/dts/am335x-wega-peb-eval-01.dtsi b/arch/arm/boot/dts/am335x-wega-peb-eval-01.dtsi
> new file mode 100644
> index 0000000..ecf3a78
> --- /dev/null
> +++ b/arch/arm/boot/dts/am335x-wega-peb-eval-01.dtsi
> @@ -0,0 +1,54 @@
> +/* Copyright (C) 2014 Christian Arlt <c.arlt@phytec.de> Phytec Messtechnik GmbH
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +&am33xx_pinmux {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&user_buttons_pins>;
> +
> +       user_buttons_pins: pinmux_user_buttons {
> +               pinctrl-single,pins = <
> +                       0x164 (PIN_INPUT | MUX_MODE7)   /* ecap0_in_pwm0_out.gpio0_7    */
> +                       0x1B4 (PIN_INPUT | MUX_MODE7)   /* xdma_event_intr1.gpio0_20    */
> +                       0x130 (PIN_INPUT | MUX_MODE7)   /* mii1_rx_clk.gpio3_10         */
> +               >;
> +       };
> +
> +       user_leds_pins: pinmux_user_leds {
> +               pinctrl-single,pins = <
> +                       0x134 (PIN_OUTPUT | MUX_MODE7)  /* mii1_rxd3.gpio2_18   */
> +                       0x138 (PIN_OUTPUT | MUX_MODE7)  /* mii1_rxd2.gpio2_19   */
> +                       0x12C (PIN_OUTPUT | MUX_MODE7)  /* mii1_tx_clk.gpio3_9  */
> +               >;
> +       };
> +};
> +
> +/ {
> +       user_leds: user_leds {
> +               compatible = "gpio-leds";
> +               pinctrl-names = "default";
> +               pinctrl-0 = <&user_leds_pins>;
> +               status = "disabled";
> +
> +               user_led_green {
> +                       gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
> +                       linux,default-trigger = "gpio";
> +                       default-state = "on";
> +               };
> +
> +               user_led_yellow {
> +                       gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
> +                       linux,default-trigger = "gpio";
> +                       default-state = "on";
> +               };
> +
> +               user_led_red {
> +                       gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>;
> +                       linux,default-trigger = "gpio";
> +                       default-state = "on";
> +               };
> +       };
> +};
> diff --git a/arch/arm/boot/dts/am335x-wega-rdk.dts b/arch/arm/boot/dts/am335x-wega-rdk.dts
> new file mode 100644
> index 0000000..35481e3
> --- /dev/null
> +++ b/arch/arm/boot/dts/am335x-wega-rdk.dts
> @@ -0,0 +1,136 @@
> +/*
> + * Copyright (C) 2014 Teresa Gámez <t.gamez@phytec.de> Phytec Messtechnik GmbH
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/dts-v1/;
> +
> +#include "am335x-phycore-som.dtsi"
> +#include "am335x-wega.dtsi"
> +#include "am335x-wega-peb-eval-01.dtsi"
> +#include "am335x-wega-peb-av-01.dtsi"
> +#include "am335x-wega-peb-av-02.dtsi"
> +
> +/* SoM */
> +&cpsw_emac0 {
> +       status = "okay";
> +};
> +
> +&cpsw_emac1 {
> +       status = "okay";
> +};
> +
> +&mac {
> +       status = "okay";
> +};
> +
> +&davinci_mdio {
> +       status = "okay";
> +};
> +
> +&i2c_eeprom {
> +       status = "okay";
> +};
> +
> +&i2c_rtc {
> +       status = "okay";
> +};
> +
> +&nandflash {
> +       partition@0 {
> +               label = "xload";
> +               reg = <0x0 0x20000>;
> +       };
> +
> +       partition@1 {
> +               label = "xload_backup1";
> +               reg = <0x20000 0x20000>;
> +       };
> +
> +       partition@2 {
> +               label = "xload_backup2";
> +               reg = <0x40000 0x20000>;
> +       };
> +
> +       partition@3 {
> +               label = "xload_backup3";
> +               reg = <0x60000 0x20000>;
> +       };
> +
> +       partition@4 {
> +               label = "barebox";
> +               reg = <0x80000 0x80000>;
> +       };
> +
> +       partition@5 {
> +               label = "bareboxenv";
> +               reg = <0x100000 0x40000>;
> +       };
> +
> +       partition@6 {
> +               label = "oftree";
> +               reg = <0x140000 0x40000>;
> +       };
> +
> +       partition@7 {
> +               label = "kernel";
> +               reg = <0x180000 0x800000>;
> +       };
> +
> +       partition@8 {
> +               label = "root";
> +               /*
> +                * setting size to 0x0 here, size will be extended to
> +                * end of nand flash while booting.
> +                */
> +               reg = <0x980000 0x0>;
> +       };
> +};
> +
> +/* Carrierboard */
> +&cppi41dma {
> +       status = "okay";
> +};
> +
> +&cpsw_emac1 {
> +       status = "okay";
> +};
> +
> +&usb_ctrl_mod {
> +       status = "okay";
> +};
> +
> +&dcan1 {
> +       status = "okay";
> +};
> +
> +&mmc1 {
> +       status = "okay";
> +};
> +
> +&uart0 {
> +       status = "okay";
> +};
> +
> +&uart1 {
> +       status = "okay";
> +};
> +
> +&usb {
> +       status = "okay";
> +};
> +
> +&usb0 {
> +       status = "okay";
> +};
> +
> +&usb0_phy {
> +       status = "okay";
> +};
> +
> +&usb1 {
> +       status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/am335x-wega.dtsi b/arch/arm/boot/dts/am335x-wega.dtsi
> new file mode 100644
> index 0000000..ef55ba4
> --- /dev/null
> +++ b/arch/arm/boot/dts/am335x-wega.dtsi
> @@ -0,0 +1,209 @@
> +/*
> + * Copyright (C) 2014 Teresa Gámez <t.gamez@phytec.de> Phytec Messtechnik GmbH
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/ {
> +       model = "Phytec AM335x phyBOARD-WEGA";
> +       compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx";
> +
> +       sound: sound_iface {
> +               compatible = "ti,da830-evm-audio";
> +       };
> +
> +       vcc3v3: fixedregulator@1 {
> +               compatible = "regulator-fixed";
> +       };
> +};
> +
> +/* Audio */
> +&am33xx_pinmux {
> +       mcasp0_pins: pinmux_mcasp0 {
> +               pinctrl-single,pins = <
> +                       0x190 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
> +                       0x194 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
> +                       0x198 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0.mcasp0_axr0 */
> +                       0x1A8 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr1.mcasp0_axr1 */
> +                       0x1AC (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahclkx.mcasp0_ahclkx */
> +               >;
> +       };
> +};
> +
> +&i2c0 {
> +       tlv320aic3007: audio_codec@18 {
> +               compatible = "ti,tlv320aic3007";
> +               reg = <0x18>;
> +               AVDD-supply = <&vcc3v3>;
> +               IOVDD-supply = <&vcc3v3>;
> +               DRVDD-supply = <&vcc3v3>;
> +               DVDD-supply = <&vdig1_reg>;
> +       };
> +};
> +
> +&mcasp0 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&mcasp0_pins>;
> +       op-mode = <0>;
> +       tdm-slots = <2>;
> +       serial-dir = <
> +               2 1 0 0 /* # 0: INACTIVE, 1: TX, 2: RX */
> +       >;
> +       tx-num-evt = <16>;
> +       rt-num-evt = <16>;
> +       status = "okay";
> +};
> +
> +&sound {
> +       ti,model = "OnboardTLV320AIC3007";
> +       ti,audio-codec = <&tlv320aic3007>;
> +       ti,mcasp-controller = <&mcasp0>;
> +       ti,codec-clock-rate = <25000000>;
> +       ti,audio-routing =
> +               "Line Out",             "LLOUT",
> +               "Line Out",             "RLOUT",
> +               "Speaker",              "SPOP",
> +               "Speaker",              "SPOM",
> +               "LINE1L",               "Line In",
> +               "LINE1R",               "Line In";
> +       status = "okay";
> +};
> +
> +&vdig1_reg {
> +               regulator-boot-on;
> +               regulator-always-on;
> +};
> +
> +/* CAN Busses */
> +&am33xx_pinmux {
> +       dcan1_pins: pinmux_dcan1 {
> +               pinctrl-single,pins = <
> +                       0x168 (PIN_OUTPUT_PULLUP | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
> +                       0x16c (PIN_INPUT_PULLUP | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
> +               >;
> +       };
> +};
> +
> +&dcan1 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&dcan1_pins>;
> +};
> +
> +/* Ethernet */
> +&am33xx_pinmux {
> +       ethernet1_pins: pinmux_ethernet1 {
> +               pinctrl-single,pins = <
> +                       0x40 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_a0.mii2_txen */
> +                       0x44 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a1.mii2_rxdv */
> +                       0x48 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_a2.mii2_txd3 */
> +                       0x4c (PIN_OUTPUT | MUX_MODE1)           /* gpmc_a3.mii2_txd2 */
> +                       0x50 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_a4.mii2_txd1 */
> +                       0x54 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_a5.mii2_txd0 */
> +                       0x58 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a6.mii2_txclk */
> +                       0x5c (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a7.mii2_rxclk */
> +                       0x60 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a8.mii2_rxd3 */
> +                       0x64 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a9.mii2_rxd2 */
> +                       0x68 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a10.mii2_rxd1 */
> +                       0x6c (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a11.mii2_rxd0 */
> +                       0x74 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_wpn.mii2_rxerr */
> +                       0x78 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_ben1.mii2_col */
> +               >;
> +       };
> +};
> +
> +&cpsw_emac1 {
> +       phy_id = <&davinci_mdio>, <1>;
> +       phy-mode = "mii";
> +       dual_emac_res_vlan = <2>;
> +       status = "disabled";
> +};
> +
> +&mac {
> +       slaves = <2>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&ethernet0_pins &ethernet1_pins>;
> +       dual_emac = <1>;
> +};
> +
> +/* MMC */
> +&am33xx_pinmux {
> +       mmc1_pins: pinmux_mmc1 {
> +               pinctrl-single,pins = <
> +                       0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat3.mmc0_dat3 */
> +                       0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat2.mmc0_dat2 */
> +                       0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat1.mmc0_dat1 */
> +                       0x0FC (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat0.mmc0_dat0 */
> +                       0x100 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_clk.mmc0_clk */
> +                       0x104 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_cmd.mmc0_cmd */
> +                       0x160 (PIN_INPUT_PULLUP | MUX_MODE7)    /* spi0_cs1.mmc0_sdcd */
> +               >;
> +       };
> +};
> +
> +&mmc1 {
> +       vmmc-supply = <&vcc3v3>;
> +       bus-width = <4>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&mmc1_pins>;
> +       cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
> +};
> +
> +/* Power */
> +&vcc3v3 {
> +       regulator-name = "vcc3v3";
> +       regulator-min-microvolt = <3300000>;
> +       regulator-max-microvolt = <3300000>;
> +       regulator-boot-on;
> +};
> +
> +/* UARTs */
> +&am33xx_pinmux {
> +       uart0_pins: pinmux_uart0 {
> +               pinctrl-single,pins = <
> +                       0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
> +                       0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
> +               >;
> +       };
> +
> +       uart1_pins: pinmux_uart1_pins {
> +               pinctrl-single,pins = <
> +                       0x180 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart1_rxd.uart1_rxd */
> +                       0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
> +                       0x178 (PIN_INPUT | MUX_MODE0)           /* uart1_ctsn.uart1_ctsn */
> +                       0x17c (PIN_OUTPUT_PULLDOWN | MUX_MODE0)         /* uart1_rtsn.uart1_rtsn */
> +               >;
> +       };
> +};
> +
> +&uart0 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&uart0_pins>;
> +};
> +
> +&uart1 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&uart1_pins>;
> +};
> +
> +/* USB */
> +&am33xx_pinmux {
> +       usb_pins: pinmux_usb {
> +               pinctrl-single,pins = <
> +                       0x21c (PIN_OUTPUT | MUX_MODE0)          /* usb0_drvvbus.usb0_drvvbus */
> +                       0x234 (PIN_OUTPUT | MUX_MODE0)          /* usb1_drvvbus.usb1_drvvbus */
> +               >;
> +       };
> +};
> +
> +&usb {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&usb_pins>;
> +};
> +
> +/* usb0 is in otg mode */
> +
> +&usb1 {
> +       dr_mode = "host";
> +};
> --
> 2.1.4
>
Tony Lindgren March 16, 2015, 8:04 p.m. UTC | #2
* Matwey V. Kornilov <matwey@sai.msu.ru> [150312 23:58]:
> Hi,
> 
> Teresa replied me, but unfortunately I found that the answer not
> reached the public maillists. Briefly, we don't need this patch,
> PhyTec will send better one this year.

OK will ignore this one then. This year sounds a bit long time
to wait though.. How about maybe send it a bit sooner? :)

Regards,

Tony
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diff mbox

Patch

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a1c776b..aa05ae4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -401,7 +401,8 @@  dtb-$(CONFIG_SOC_AM33XX) += \
 	am335x-evmsk.dtb \
 	am335x-nano.dtb \
 	am335x-pepper.dtb \
-	am335x-lxm.dtb
+	am335x-lxm.dtb \
+	am335x-wega-rdk.dts
 dtb-$(CONFIG_ARCH_OMAP4) += \
 	omap4-duovero-parlor.dtb \
 	omap4-panda.dtb \
diff --git a/arch/arm/boot/dts/am335x-phycore-som.dtsi b/arch/arm/boot/dts/am335x-phycore-som.dtsi
new file mode 100644
index 0000000..aa7826d
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-phycore-som.dtsi
@@ -0,0 +1,275 @@ 
+/*
+ * Copyright (C) 2014 Teresa Gámez <t.gamez@phytec.de> Phytec Messtechnik GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "am33xx.dtsi"
+
+/ {
+	model = "Phytec AM335x phyCORE";
+	compatible = "phytec,am335x-phycore-som", "ti,am33xx";
+
+	aliases {
+		rtc0 = &i2c_rtc;
+		rtc1 = &rtc;
+	};
+
+	cpus {
+		cpu@0 {
+			cpu0-supply = <&vdd1_reg>;
+		};
+	};
+
+	/* This is a dummy node. Will be set by a bootloader */
+	memory {
+		device_type = "memory";
+		reg = <0x80000000 0x20000000>; /* 512 MB */
+	};
+
+	vcc5v: fixedregulator@0 {
+		compatible = "regulator-fixed";
+	};
+};
+
+/* Crypto Module */
+&aes {
+	status = "okay";
+};
+
+&sham {
+	status = "okay";
+};
+
+/* Ethernet */
+&am33xx_pinmux {
+	ethernet0_pins: pinmux_ethernet0 {
+		pinctrl-single,pins = <
+			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_crs.rmii1_crs_dv */
+			0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_rxerr.rmii1_rxerr */
+			0x114 (PIN_OUTPUT | MUX_MODE1)		/* mii1_txen.rmii1_txen */
+			0x124 (PIN_OUTPUT | MUX_MODE1)		/* mii1_txd1.rmii1_txd1 */
+			0x128 (PIN_OUTPUT | MUX_MODE1)		/* mii1_txd0.rmii1_txd0 */
+			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_rxd1.rmii1_rxd1 */
+			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_rxd0.rmii1_rxd0 */
+			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* rmii1_refclk.rmii1_refclk */
+		>;
+	};
+
+	mdio_pins: pinmux_mdio {
+		pinctrl-single,pins = <
+			/* MDIO */
+			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
+			0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
+		>;
+	};
+};
+
+&cpsw_emac0 {
+	phy_id = <&davinci_mdio>, <0>;
+	phy-mode = "rmii";
+	dual_emac_res_vlan = <1>;
+	status = "disabled";
+};
+
+&cpsw_emac1 {
+	status = "disabled";
+};
+
+&davinci_mdio {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mdio_pins>;
+	status = "disabled";
+};
+
+&mac {
+	slaves = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&ethernet0_pins>;
+};
+
+&phy_sel {
+	rmii-clock-ext;
+};
+
+/* I2C Busses */
+&am33xx_pinmux {
+	i2c0_pins: pinmux_i2c0 {
+		pinctrl-single,pins = <
+			0x188 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
+			0x18c (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
+		>;
+	};
+};
+
+&i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_pins>;
+	clock-frequency = <400000>;
+	status = "okay";
+
+	tps: pmic@2d {
+		reg = <0x2d>;
+	};
+
+	i2c_eeprom: eeprom@52 {
+		compatible = "at,24c32";
+		pagesize = <32>;
+		reg = <0x52>;
+		status = "disabled";
+	};
+
+	i2c_rtc: rtc@68 {
+		compatible = "mc,rv4162c7";
+		reg = <0x68>;
+		status = "disabled";
+	};
+};
+
+/* NAND memory */
+&am33xx_pinmux {
+		nandflash_pins: pinmux_nandflash {
+			pinctrl-single,pins = <
+			0x0 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
+			0x4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
+			0x8 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
+			0xc (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
+			0x10 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
+			0x14 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
+			0x18 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
+			0x1c (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
+			0x70 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */
+			0x7c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_csn0.gpmc_csn0 */
+			0x90 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_advn_ale.gpmc_advn_ale */
+			0x94 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_oen_ren.gpmc_oen_ren */
+			0x98 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_wen.gpmc_wen */
+			0x9c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_be0n_cle.gpmc_be0n_cle */
+		>;
+	};
+};
+
+&elm {
+	status = "okay";
+};
+
+&gpmc {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&nandflash_pins>;
+	ranges = <0 0 0x08000000 0x10000000>;   /* CS0: NAND */
+	nandflash: nand@0,0 {
+		reg = <0 0 0>; /* CS0, offset 0 */
+		nand-bus-width = <8>;
+		ti,nand-ecc-opt = "bch8";
+		gpmc,device-nand = "true";
+		gpmc,device-width = <1>;
+		gpmc,sync-clk-ps = <0>;
+		gpmc,cs-on-ns = <0>;
+		gpmc,cs-rd-off-ns = <30>;
+		gpmc,cs-wr-off-ns = <30>;
+		gpmc,adv-on-ns = <0>;
+		gpmc,adv-rd-off-ns = <30>;
+		gpmc,adv-wr-off-ns = <30>;
+		gpmc,we-on-ns = <0>;
+		gpmc,we-off-ns = <20>;
+		gpmc,oe-on-ns = <10>;
+		gpmc,oe-off-ns = <30>;
+		gpmc,access-ns = <30>;
+		gpmc,rd-cycle-ns = <30>;
+		gpmc,wr-cycle-ns = <30>;
+		gpmc,wait-on-read = "true";
+		gpmc,wait-on-write = "true";
+		gpmc,bus-turnaround-ns = <0>;
+		gpmc,cycle2cycle-delay-ns = <50>;
+		gpmc,cycle2cycle-diffcsen;
+		gpmc,clk-activation-ns = <0>;
+		gpmc,wait-monitoring-ns = <0>;
+		gpmc,wr-access-ns = <30>;
+		gpmc,wr-data-mux-bus-ns = <0>;
+
+		elm_id = <&elm>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+};
+
+/* Power */
+#include "tps65910.dtsi"
+
+&tps {
+	vcc1-supply = <&vcc5v>;
+	vcc2-supply = <&vcc5v>;
+	vcc3-supply = <&vcc5v>;
+	vcc4-supply = <&vcc5v>;
+	vcc5-supply = <&vcc5v>;
+	vcc6-supply = <&vcc5v>;
+	vcc7-supply = <&vcc5v>;
+	vccio-supply = <&vcc5v>;
+
+	regulators {
+		vdd1_reg: regulator@2 {
+			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+			regulator-name = "vdd_mpu";
+			regulator-min-microvolt = <912500>;
+			regulator-max-microvolt = <1312500>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		vdd2_reg: regulator@3 {
+			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+			regulator-name = "vdd_core";
+			regulator-min-microvolt = <912500>;
+			regulator-max-microvolt = <1150000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		vdig1_reg: regulator@5 {
+			regulator-name = "vdig1_1p8v";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+		};
+
+		vmmc_reg: regulator@12 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <3300000>;
+		};
+	};
+};
+
+&vcc5v {
+	regulator-name = "vcc5v";
+	regulator-min-microvolt = <5000000>;
+	regulator-max-microvolt = <5000000>;
+	regulator-boot-on;
+};
+
+/* SPI Busses */
+&am33xx_pinmux {
+	spi0_pins: pinmux_spi0 {
+		pinctrl-single,pins = <
+			0x150 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* spi0_clk.spi0_clk */
+			0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* spi0_d0.spi0_d0 */
+			0x158 (PIN_INPUT_PULLUP | MUX_MODE0)	/* spi0_d1.spi0_d1 */
+			0x15c (PIN_INPUT_PULLUP | MUX_MODE0)	/* spi0_cs0.spi0_cs0 */
+		>;
+	};
+};
+
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_pins>;
+	status = "okay";
+
+	serial_flash: m25p80@0 {
+		compatible = "m25p80";
+		spi-max-frequency = <48000000>;
+		reg = <0x0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+};
diff --git a/arch/arm/boot/dts/am335x-phytec-lcd-018.dtsi b/arch/arm/boot/dts/am335x-phytec-lcd-018.dtsi
new file mode 100644
index 0000000..daa9b2e
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-phytec-lcd-018.dtsi
@@ -0,0 +1,109 @@ 
+/*
+ * Copyright (C) 2014 Wadim Egorov <w.egorov@phytec.de> PHYTEC Messtechnik GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * The board specific DTS file have to:
+ *  - Specify pwms and enable gpios for backlight
+ *  - Mux the display enable pins if available
+ *  - Create the i2c_ts node on the specific i2c bus
+*/
+
+&am33xx_pinmux {
+	lcd_pins: pinmux_lcd {
+		pinctrl-single,pins = <
+			0xA0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data0.lcd_data0 */
+			0xA4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data1.lcd_data1 */
+			0xA8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data2.lcd_data2 */
+			0xAC (PIN_OUTPUT | MUX_MODE0)	/* lcd_data3.lcd_data3 */
+			0xB0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data4.lcd_data4 */
+			0xB4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data5.lcd_data5 */
+			0xB8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data6.lcd_data6 */
+			0xBC (PIN_OUTPUT | MUX_MODE0)	/* lcd_data7.lcd_data7 */
+			0xC0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data8.lcd_data8 */
+			0xC4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data9.lcd_data9 */
+			0xC8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data10.lcd_data10 */
+			0xCC (PIN_OUTPUT | MUX_MODE0)	/* lcd_data11.lcd_data11 */
+			0xD0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data12.lcd_data12 */
+			0xD4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data13.lcd_data13 */
+			0xD8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data14.lcd_data14 */
+			0xDC (PIN_OUTPUT | MUX_MODE0)	/* lcd_data15.lcd_data15 */
+			0x3C (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad15.lcd_data16 */
+			0x38 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad14.lcd_data17 */
+			0x34 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad13.lcd_data18 */
+			0x30 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad12.lcd_data19 */
+			0x2C (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad11.lcd_data20 */
+			0x28 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad10.lcd_data21 */
+			0x24 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad9.lcd_data22 */
+			0x20 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad8.lcd_data23 */
+			0xE0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_vsync.lcd_vsync */
+			0xE4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_hsync.lcd_hsync */
+			0xE8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_pclk.lcd_pclk */
+			0xEC (PIN_OUTPUT | MUX_MODE0)	/* lcd_ac_bias_en.lcd_ac_bias_en */
+		>;
+	};
+};
+
+/ {
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		brightness-levels = <0 4 8 16 32 64 128 255>;
+		default-brightness-level = <6>;
+		power-supply = <&lcd_3v3>;
+		status = "disabled";
+	};
+
+	lcd_3v3: fixedregulator-lcd {
+		compatible = "regulator-fixed";
+		regulator-name = "lcd_3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+	};
+
+	panel: panel {
+		compatible = "ti,tilcdc,panel";
+		pinctrl-names = "default";
+		pinctrl-0 = <&lcd_pins>;
+		status = "disabled";
+
+		panel-info {
+			ac-bias = <255>;
+			ac-bias-intrpt = <0>;
+			dma-burst-sz = <16>;
+			bpp = <32>;
+			fdd = <0x80>;
+			sync-edge = <0>;
+			sync-ctrl = <1>;
+			raster-order = <0>;
+			fifo-th = <0>;
+			invert-pxl-clk = <1>;
+		};
+
+		display-timings {
+			native-mode = <&timing0>;
+			timing0: ETM0700G0DH6 {
+				clock-frequency	= <40000000>;
+				hactive = <800>;
+				vactive = <480>;
+				hfront-porch = <40>;
+				hback-porch = <216>;
+				hsync-len = <128>;
+				vback-porch = <35>;
+				vfront-porch = <10>;
+				vsync-len = <2>;
+				hsync-active = <1>;
+				vsync-active = <1>;
+			};
+		};
+	};
+};
+
+&i2c_ts {
+	compatible = "edt,edt-ft5x06";
+	reg = <0x38>;
+};
diff --git a/arch/arm/boot/dts/am335x-wega-peb-av-01.dtsi b/arch/arm/boot/dts/am335x-wega-peb-av-01.dtsi
new file mode 100644
index 0000000..503ecb3
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-wega-peb-av-01.dtsi
@@ -0,0 +1,71 @@ 
+/*
+ * Copyright (C) 2014 Christian Arlt <c.arlt@phytec.de> Phytec Messtechnik GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+	hdmi: hdmi {
+		compatible = "ti,tilcdc,slave";
+		i2c = <&i2c0>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&hdmi_pins>;
+		status = "disabled";
+
+		panel-info {
+			/* required */
+			ac-bias = <255>;
+			ac-bias-intrpt = <0>;
+			dma-burst-sz = <16>;
+			bpp = <32>;
+			fdd = <16>;
+			sync-edge = <1>;	/* stabilizes picture	*/
+			sync-ctrl = <1>;
+			raster-order = <0>;
+			fifo-th = <0>;
+
+			/* optional */
+			invert-pxl-clk = <1>;
+			tft-alt-mode = <0>;
+		};
+	};
+};
+
+&am33xx_pinmux {
+	hdmi_pins: pinmux_hdmi {
+		pinctrl-single,pins = <
+			0xA0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data0.lcd_data0 */
+			0xA4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data1.lcd_data1 */
+			0xA8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data2.lcd_data2 */
+			0xAC (PIN_OUTPUT | MUX_MODE0)   /* lcd_data3.lcd_data3 */
+			0xB0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data4.lcd_data4 */
+			0xB4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data5.lcd_data5 */
+			0xB8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data6.lcd_data6 */
+			0xBC (PIN_OUTPUT | MUX_MODE0)   /* lcd_data7.lcd_data7 */
+			0xC0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data8.lcd_data8 */
+			0xC4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data9.lcd_data9 */
+			0xC8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data10.lcd_data10 */
+			0xCC (PIN_OUTPUT | MUX_MODE0)   /* lcd_data11.lcd_data11 */
+			0xD0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data12.lcd_data12 */
+			0xD4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data13.lcd_data13 */
+			0xD8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data14.lcd_data14 */
+			0xDC (PIN_OUTPUT | MUX_MODE0)   /* lcd_data15.lcd_data15 */
+			0x3C (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad15.lcd_data16 */
+			0x38 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad14.lcd_data17 */
+			0x34 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad13.lcd_data18 */
+			0x30 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad12.lcd_data19 */
+			0x2C (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad11.lcd_data20 */
+			0x28 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad10.lcd_data21 */
+			0x24 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad9.lcd_data22 */
+			0x20 (PIN_OUTPUT | MUX_MODE1)   /* gpmc_ad8.lcd_data23 */
+			0xE0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_vsync.lcd_vsync */
+			0xE4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_hsync.lcd_hsync */
+			0xE8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_pclk.lcd_pclk */
+			0xEC (PIN_OUTPUT | MUX_MODE0)   /* lcd_ac_bias_en.lcd_ac_bias_en */
+			0x80 (PIN_OUTPUT | MUX_MODE7)	/* gpmc_csn1.x_av_int_gpio1_30	*/
+		>;
+	};
+};
diff --git a/arch/arm/boot/dts/am335x-wega-peb-av-02.dtsi b/arch/arm/boot/dts/am335x-wega-peb-av-02.dtsi
new file mode 100644
index 0000000..fd76760
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-wega-peb-av-02.dtsi
@@ -0,0 +1,44 @@ 
+/*
+ * Copyright (C) 2014 Christian Arlt <c.arlt@phytec.de> Phytec Messtechnik GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&am33xx_pinmux {
+	ecap2_pins: backlight_pins {
+		pinctrl-single,pins = <
+			0x19c (PIN_OUTPUT | MUX_MODE4)		/* mcasp0_ahclkr.ecap2_in_pwm2_out	*/
+		>;
+	};
+
+	ts_irq_pin: pinmux_ts_irq {
+		pinctrl-single,pins = <
+			0x80 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_csn1.x_av_int_gpio1_30	*/
+		>;
+	};
+};
+
+&i2c0 {
+	i2c_ts: touchscreen@38 {
+		pinctrl-names = "default";
+		pinctrl-0 = <&ts_irq_pin>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <30 0>;
+		status = "disabled";
+	};
+};
+
+&ecap2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ecap2_pins>;
+	status = "disabled";
+};
+
+#include "am335x-phytec-lcd-018.dtsi"
+
+&backlight {
+	pwms = <&ecap2 0 100000 0>;
+	enable-gpios = <&gpio3 19 0>;
+};
diff --git a/arch/arm/boot/dts/am335x-wega-peb-eval-01.dtsi b/arch/arm/boot/dts/am335x-wega-peb-eval-01.dtsi
new file mode 100644
index 0000000..ecf3a78
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-wega-peb-eval-01.dtsi
@@ -0,0 +1,54 @@ 
+/* Copyright (C) 2014 Christian Arlt <c.arlt@phytec.de> Phytec Messtechnik GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&am33xx_pinmux {
+	pinctrl-names = "default";
+	pinctrl-0 = <&user_buttons_pins>;
+
+	user_buttons_pins: pinmux_user_buttons {
+		pinctrl-single,pins = <
+			0x164 (PIN_INPUT | MUX_MODE7)	/* ecap0_in_pwm0_out.gpio0_7	*/
+			0x1B4 (PIN_INPUT | MUX_MODE7)	/* xdma_event_intr1.gpio0_20	*/
+			0x130 (PIN_INPUT | MUX_MODE7)	/* mii1_rx_clk.gpio3_10		*/
+		>;
+	};
+
+	user_leds_pins: pinmux_user_leds {
+		pinctrl-single,pins = <
+			0x134 (PIN_OUTPUT | MUX_MODE7)	/* mii1_rxd3.gpio2_18	*/
+			0x138 (PIN_OUTPUT | MUX_MODE7)	/* mii1_rxd2.gpio2_19	*/
+			0x12C (PIN_OUTPUT | MUX_MODE7)	/* mii1_tx_clk.gpio3_9	*/
+		>;
+	};
+};
+
+/ {
+	user_leds: user_leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&user_leds_pins>;
+		status = "disabled";
+
+		user_led_green {
+			gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "gpio";
+			default-state = "on";
+		};
+
+		user_led_yellow {
+			gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "gpio";
+			default-state = "on";
+		};
+
+		user_led_red {
+			gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "gpio";
+			default-state = "on";
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/am335x-wega-rdk.dts b/arch/arm/boot/dts/am335x-wega-rdk.dts
new file mode 100644
index 0000000..35481e3
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-wega-rdk.dts
@@ -0,0 +1,136 @@ 
+/*
+ * Copyright (C) 2014 Teresa Gámez <t.gamez@phytec.de> Phytec Messtechnik GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "am335x-phycore-som.dtsi"
+#include "am335x-wega.dtsi"
+#include "am335x-wega-peb-eval-01.dtsi"
+#include "am335x-wega-peb-av-01.dtsi"
+#include "am335x-wega-peb-av-02.dtsi"
+
+/* SoM */
+&cpsw_emac0 {
+	status = "okay";
+};
+
+&cpsw_emac1 {
+	status = "okay";
+};
+
+&mac {
+	status = "okay";
+};
+
+&davinci_mdio {
+	status = "okay";
+};
+
+&i2c_eeprom {
+	status = "okay";
+};
+
+&i2c_rtc {
+	status = "okay";
+};
+
+&nandflash {
+	partition@0 {
+		label = "xload";
+		reg = <0x0 0x20000>;
+	};
+
+	partition@1 {
+		label = "xload_backup1";
+		reg = <0x20000 0x20000>;
+	};
+
+	partition@2 {
+		label = "xload_backup2";
+		reg = <0x40000 0x20000>;
+	};
+
+	partition@3 {
+		label = "xload_backup3";
+		reg = <0x60000 0x20000>;
+	};
+
+	partition@4 {
+		label = "barebox";
+		reg = <0x80000 0x80000>;
+	};
+
+	partition@5 {
+		label = "bareboxenv";
+		reg = <0x100000 0x40000>;
+	};
+
+	partition@6 {
+		label = "oftree";
+		reg = <0x140000 0x40000>;
+	};
+
+	partition@7 {
+		label = "kernel";
+		reg = <0x180000 0x800000>;
+	};
+
+	partition@8 {
+		label = "root";
+		/*
+		 * setting size to 0x0 here, size will be extended to
+		 * end of nand flash while booting.
+		 */
+		reg = <0x980000 0x0>;
+	};
+};
+
+/* Carrierboard */
+&cppi41dma {
+	status = "okay";
+};
+
+&cpsw_emac1 {
+	status = "okay";
+};
+
+&usb_ctrl_mod {
+	status = "okay";
+};
+
+&dcan1 {
+	status = "okay";
+};
+
+&mmc1 {
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&usb {
+	status = "okay";
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&usb0_phy {
+	status = "okay";
+};
+
+&usb1 {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/am335x-wega.dtsi b/arch/arm/boot/dts/am335x-wega.dtsi
new file mode 100644
index 0000000..ef55ba4
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-wega.dtsi
@@ -0,0 +1,209 @@ 
+/*
+ * Copyright (C) 2014 Teresa Gámez <t.gamez@phytec.de> Phytec Messtechnik GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+	model = "Phytec AM335x phyBOARD-WEGA";
+	compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx";
+
+	sound: sound_iface {
+		compatible = "ti,da830-evm-audio";
+	};
+
+	vcc3v3: fixedregulator@1 {
+		compatible = "regulator-fixed";
+	};
+};
+
+/* Audio */
+&am33xx_pinmux {
+	mcasp0_pins: pinmux_mcasp0 {
+		pinctrl-single,pins = <
+			0x190 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
+			0x194 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
+			0x198 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0.mcasp0_axr0 */
+			0x1A8 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr1.mcasp0_axr1 */
+			0x1AC (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahclkx.mcasp0_ahclkx */
+		>;
+	};
+};
+
+&i2c0 {
+	tlv320aic3007: audio_codec@18 {
+		compatible = "ti,tlv320aic3007";
+		reg = <0x18>;
+		AVDD-supply = <&vcc3v3>;
+		IOVDD-supply = <&vcc3v3>;
+		DRVDD-supply = <&vcc3v3>;
+		DVDD-supply = <&vdig1_reg>;
+	};
+};
+
+&mcasp0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mcasp0_pins>;
+	op-mode = <0>;
+	tdm-slots = <2>;
+	serial-dir = <
+		2 1 0 0 /* # 0: INACTIVE, 1: TX, 2: RX */
+	>;
+	tx-num-evt = <16>;
+	rt-num-evt = <16>;
+	status = "okay";
+};
+
+&sound {
+	ti,model = "OnboardTLV320AIC3007";
+	ti,audio-codec = <&tlv320aic3007>;
+	ti,mcasp-controller = <&mcasp0>;
+	ti,codec-clock-rate = <25000000>;
+	ti,audio-routing =
+		"Line Out",		"LLOUT",
+		"Line Out",		"RLOUT",
+		"Speaker",		"SPOP",
+		"Speaker",		"SPOM",
+		"LINE1L",		"Line In",
+		"LINE1R",		"Line In";
+	status = "okay";
+};
+
+&vdig1_reg {
+		regulator-boot-on;
+		regulator-always-on;
+};
+
+/* CAN Busses */
+&am33xx_pinmux {
+	dcan1_pins: pinmux_dcan1 {
+		pinctrl-single,pins = <
+			0x168 (PIN_OUTPUT_PULLUP | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
+			0x16c (PIN_INPUT_PULLUP | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
+		>;
+	};
+};
+
+&dcan1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&dcan1_pins>;
+};
+
+/* Ethernet */
+&am33xx_pinmux {
+	ethernet1_pins: pinmux_ethernet1 {
+		pinctrl-single,pins = <
+			0x40 (PIN_OUTPUT | MUX_MODE1)		/* gpmc_a0.mii2_txen */
+			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* gpmc_a1.mii2_rxdv */
+			0x48 (PIN_OUTPUT | MUX_MODE1)		/* gpmc_a2.mii2_txd3 */
+			0x4c (PIN_OUTPUT | MUX_MODE1)		/* gpmc_a3.mii2_txd2 */
+			0x50 (PIN_OUTPUT | MUX_MODE1)		/* gpmc_a4.mii2_txd1 */
+			0x54 (PIN_OUTPUT | MUX_MODE1)		/* gpmc_a5.mii2_txd0 */
+			0x58 (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* gpmc_a6.mii2_txclk */
+			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* gpmc_a7.mii2_rxclk */
+			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* gpmc_a8.mii2_rxd3 */
+			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* gpmc_a9.mii2_rxd2 */
+			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* gpmc_a10.mii2_rxd1 */
+			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* gpmc_a11.mii2_rxd0 */
+			0x74 (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* gpmc_wpn.mii2_rxerr */
+			0x78 (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* gpmc_ben1.mii2_col */
+		>;
+	};
+};
+
+&cpsw_emac1 {
+	phy_id = <&davinci_mdio>, <1>;
+	phy-mode = "mii";
+	dual_emac_res_vlan = <2>;
+	status = "disabled";
+};
+
+&mac {
+	slaves = <2>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&ethernet0_pins &ethernet1_pins>;
+	dual_emac = <1>;
+};
+
+/* MMC */
+&am33xx_pinmux {
+	mmc1_pins: pinmux_mmc1 {
+		pinctrl-single,pins = <
+			0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3.mmc0_dat3 */
+			0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2.mmc0_dat2 */
+			0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1.mmc0_dat1 */
+			0x0FC (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0.mmc0_dat0 */
+			0x100 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk.mmc0_clk */
+			0x104 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd.mmc0_cmd */
+			0x160 (PIN_INPUT_PULLUP | MUX_MODE7)	/* spi0_cs1.mmc0_sdcd */
+		>;
+	};
+};
+
+&mmc1 {
+	vmmc-supply = <&vcc3v3>;
+	bus-width = <4>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins>;
+	cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+};
+
+/* Power */
+&vcc3v3 {
+	regulator-name = "vcc3v3";
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-boot-on;
+};
+
+/* UARTs */
+&am33xx_pinmux {
+	uart0_pins: pinmux_uart0 {
+		pinctrl-single,pins = <
+			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
+			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
+		>;
+	};
+
+	uart1_pins: pinmux_uart1_pins {
+		pinctrl-single,pins = <
+			0x180 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_rxd.uart1_rxd */
+			0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_txd.uart1_txd */
+			0x178 (PIN_INPUT | MUX_MODE0)		/* uart1_ctsn.uart1_ctsn */
+			0x17c (PIN_OUTPUT_PULLDOWN | MUX_MODE0)		/* uart1_rtsn.uart1_rtsn */
+		>;
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins>;
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_pins>;
+};
+
+/* USB */
+&am33xx_pinmux {
+	usb_pins: pinmux_usb {
+		pinctrl-single,pins = <
+			0x21c (PIN_OUTPUT | MUX_MODE0)		/* usb0_drvvbus.usb0_drvvbus */
+			0x234 (PIN_OUTPUT | MUX_MODE0)		/* usb1_drvvbus.usb1_drvvbus */
+		>;
+	};
+};
+
+&usb {
+	pinctrl-names = "default";
+	pinctrl-0 = <&usb_pins>;
+};
+
+/* usb0 is in otg mode */
+
+&usb1 {
+	dr_mode = "host";
+};