From patchwork Mon Mar 16 20:54:53 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 6025411 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 861A99F318 for ; Mon, 16 Mar 2015 20:55:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8B98420437 for ; Mon, 16 Mar 2015 20:55:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 67F7320434 for ; Mon, 16 Mar 2015 20:55:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965113AbbCPUz2 (ORCPT ); Mon, 16 Mar 2015 16:55:28 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:37769 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753773AbbCPUzZ (ORCPT ); Mon, 16 Mar 2015 16:55:25 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id t2GKswpS008241; Mon, 16 Mar 2015 15:54:58 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id t2GKsv9a027643; Mon, 16 Mar 2015 15:54:57 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.224.2; Mon, 16 Mar 2015 15:54:57 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id t2GKsuC7016153; Mon, 16 Mar 2015 15:54:56 -0500 Received: from localhost (irmo.am.dhcp.ti.com [128.247.71.175]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id t2GKsu919391; Mon, 16 Mar 2015 15:54:56 -0500 (CDT) From: Suman Anna To: Paul Walmsley CC: Tony Lindgren , , , Suman Anna Subject: [PATCH 1/2] ARM: DRA7: hwmod: Add data for GPTimers 13 through 16 Date: Mon, 16 Mar 2015 15:54:53 -0500 Message-ID: <1426539294-28375-2-git-send-email-s-anna@ti.com> X-Mailer: git-send-email 2.3.2 In-Reply-To: <1426539294-28375-1-git-send-email-s-anna@ti.com> References: <1426539294-28375-1-git-send-email-s-anna@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the hwmod data for GPTimers 13, 14, 15 and 16. All these timers are present in the L4PER3 clock domain. The corresponding DT nodes are already present but disabled. Signed-off-by: Suman Anna --- arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 96 +++++++++++++++++++++++++++++++ 1 file changed, 96 insertions(+) diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index e8692e7675b8..d0f03e73add4 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -1958,6 +1958,66 @@ static struct omap_hwmod dra7xx_timer11_hwmod = { }, }; +/* timer13 */ +static struct omap_hwmod dra7xx_timer13_hwmod = { + .name = "timer13", + .class = &dra7xx_timer_hwmod_class, + .clkdm_name = "l4per3_clkdm", + .main_clk = "timer13_gfclk_mux", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4PER3_TIMER13_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4PER3_TIMER13_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + +/* timer14 */ +static struct omap_hwmod dra7xx_timer14_hwmod = { + .name = "timer14", + .class = &dra7xx_timer_hwmod_class, + .clkdm_name = "l4per3_clkdm", + .main_clk = "timer14_gfclk_mux", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4PER3_TIMER14_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4PER3_TIMER14_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + +/* timer15 */ +static struct omap_hwmod dra7xx_timer15_hwmod = { + .name = "timer15", + .class = &dra7xx_timer_hwmod_class, + .clkdm_name = "l4per3_clkdm", + .main_clk = "timer15_gfclk_mux", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4PER3_TIMER15_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4PER3_TIMER15_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + +/* timer16 */ +static struct omap_hwmod dra7xx_timer16_hwmod = { + .name = "timer16", + .class = &dra7xx_timer_hwmod_class, + .clkdm_name = "l4per3_clkdm", + .main_clk = "timer16_gfclk_mux", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4PER3_TIMER16_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4PER3_TIMER16_CONTEXT_OFFSET, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + /* * 'uart' class * @@ -3112,6 +3172,38 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per1__timer11 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l4_per3 -> timer13 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__timer13 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_timer13_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> timer14 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__timer14 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_timer14_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> timer15 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__timer15 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_timer15_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> timer16 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__timer16 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_timer16_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + /* l4_per1 -> uart1 */ static struct omap_hwmod_ocp_if dra7xx_l4_per1__uart1 = { .master = &dra7xx_l4_per1_hwmod, @@ -3350,6 +3442,10 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { &dra7xx_l4_per1__timer9, &dra7xx_l4_per1__timer10, &dra7xx_l4_per1__timer11, + &dra7xx_l4_per3__timer13, + &dra7xx_l4_per3__timer14, + &dra7xx_l4_per3__timer15, + &dra7xx_l4_per3__timer16, &dra7xx_l4_per1__uart1, &dra7xx_l4_per1__uart2, &dra7xx_l4_per1__uart3,