From patchwork Fri Jul 17 20:56:31 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gerlach X-Patchwork-Id: 6819151 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 88D8F9F2E8 for ; Fri, 17 Jul 2015 20:58:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AD979207E3 for ; Fri, 17 Jul 2015 20:58:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BD400207D7 for ; Fri, 17 Jul 2015 20:58:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753957AbbGQU6J (ORCPT ); Fri, 17 Jul 2015 16:58:09 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:36817 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752399AbbGQU5B (ORCPT ); Fri, 17 Jul 2015 16:57:01 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id t6HKuXgX011914; Fri, 17 Jul 2015 15:56:33 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t6HKuXvd002389; Fri, 17 Jul 2015 15:56:33 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.224.2; Fri, 17 Jul 2015 15:56:06 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t6HKuXsI022625; Fri, 17 Jul 2015 15:56:33 -0500 Received: from localhost (uda0274052.am.dhcp.ti.com [128.247.9.225]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id t6HKuX919590; Fri, 17 Jul 2015 15:56:33 -0500 (CDT) From: Dave Gerlach To: , , , CC: Jassi Brar , Santosh Shilimkar , Suman Anna , Dave Gerlach , Keerthy , Tony Lindgren Subject: [PATCH v2 2/3] Documentation: dt: add bindings for TI Wakeup M3 IPC device Date: Fri, 17 Jul 2015 15:56:31 -0500 Message-ID: <1437166592-25378-3-git-send-email-d-gerlach@ti.com> X-Mailer: git-send-email 2.4.6 In-Reply-To: <1437166592-25378-1-git-send-email-d-gerlach@ti.com> References: <1437166592-25378-1-git-send-email-d-gerlach@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the device tree bindings document for the TI Wakeup M3 IPC device on AM33xx and AM43xx SoCs. These devices are used by the TI wkup_m3_ipc driver, and contain the registers upon which the IPC protocol to communicate with the Wakeup M3 processor is implemented. Signed-off-by: Dave Gerlach Signed-off-by: Suman Anna --- .../devicetree/bindings/soc/ti/wkup_m3_ipc.txt | 57 ++++++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/ti/wkup_m3_ipc.txt diff --git a/Documentation/devicetree/bindings/soc/ti/wkup_m3_ipc.txt b/Documentation/devicetree/bindings/soc/ti/wkup_m3_ipc.txt new file mode 100644 index 0000000..4015504 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/ti/wkup_m3_ipc.txt @@ -0,0 +1,57 @@ +Wakeup M3 IPC Driver +===================== + +The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor +(commonly referred to as Wakeup M3 or CM3) to help with various low power tasks +that cannot be controlled from the MPU, like suspend/resume and certain deep +C-states for CPU Idle. Once the wkup_m3_ipc driver uses the wkup_m3_rproc driver +to boot the wkup_m3, it handles communication with the CM3 using IPC registers +present in the SoC's control module and a mailbox. The wkup_m3_ipc exposes an +API to allow the SoC PM code to execute specific PM tasks. + +Wkup M3 Device Node: +==================== +A wkup_m3_ipc device node is used to represent the IPC registers within an +SoC. + +Required properties: +-------------------- +- compatible: Should be, + "ti,am3352-wkup-m3-ipc" for AM33xx SoCs + "ti,am4372-wkup-m3-ipc" for AM43xx SoCs +- reg: Contains the IPC register address space to communicate + with the Wakeup M3 processor +- interrupts: Contains the interrupt information for the wkup_m3 + interrupt that signals the MPU. +- ti,rproc: phandle to the wkup_m3 rproc node so the IPC driver + can boot it. +- mboxes: phandles used by IPC framework to get correct mbox + channel for communication. Must point to appropriate + mbox_wkupm3 child node. + +Example: +-------- +/* AM33xx */ + l4_wkup: l4_wkup@44c00000 { + ... + + scm: scm@210000 { + compatible = "ti,am3-scm", "simple-bus"; + reg = <0x210000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x210000 0x2000>; + + ... + + wkup_m3_ipc: wkup_m3_ipc@1324 { + compatible = "ti,am3352-wkup-m3-ipc"; + reg = <0x1324 0x24>; + interrupts = <78>; + ti,rproc = <&wkup_m3>; + mboxes = <&mailbox &mbox_wkupm3>; + }; + + ... + }; + };