From patchwork Fri Aug 14 12:20:28 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 7014511 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2FF6E9F358 for ; Fri, 14 Aug 2015 12:22:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 60B25207CD for ; Fri, 14 Aug 2015 12:22:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7A5E1207CA for ; Fri, 14 Aug 2015 12:22:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754859AbbHNMVf (ORCPT ); Fri, 14 Aug 2015 08:21:35 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:39452 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754282AbbHNMV3 (ORCPT ); Fri, 14 Aug 2015 08:21:29 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id t7ECKeIk009840; Fri, 14 Aug 2015 07:20:40 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t7ECKeU2031030; Fri, 14 Aug 2015 07:20:40 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.224.2; Fri, 14 Aug 2015 07:20:40 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id t7ECKdUF005360; Fri, 14 Aug 2015 07:20:40 -0500 From: Grygorii Strashko To: , , CC: , , , , , , , Grygorii Strashko , Sudeep Holla Subject: [PATCH v3 4/6] ARM: OMAP: wakeupgen: fix arm gic irq type configuration Date: Fri, 14 Aug 2015 15:20:28 +0300 Message-ID: <1439554830-19502-5-git-send-email-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1439554830-19502-1-git-send-email-grygorii.strashko@ti.com> References: <1439554830-19502-1-git-send-email-grygorii.strashko@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP It's observed that ARM GIC IRQ triggering type is not configured properly when IRQ is routed through IRQ domain hierarchy and system started using DT. As result, system will start using default ARM GIC configuration, ignore DT IRQ triggering configuration, and value of desc->irq_data.state_use_accessors = 0. In case of TI OMAP DRA7 the following IRQ hierarchy is defined: ARM GIC <- OMAP wakeupgen <- TI CBAR Failed call chain: irq_create_of_mapping irq_set_irq_type __irq_set_trigger if (!chip || !chip->irq_set_type) { return 0; <- return here } OMAP wakeupgen has no .irq_set_type() defined and, so, IRQ triggering configuration will not be propagated to parent IRQ domain. Hence, fix it by using irq_chip_set_type_parent() for propagation IRQ triggering type to parent IRQ domains. Cc: Sudeep Holla Fixes: 7136d457f365 ('ARM: omap: convert wakeupgen to stacked domains') Acked-by: Tony Lindgren Signed-off-by: Grygorii Strashko --- arch/arm/mach-omap2/omap-wakeupgen.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c index 8e52621..e1d2e99 100644 --- a/arch/arm/mach-omap2/omap-wakeupgen.c +++ b/arch/arm/mach-omap2/omap-wakeupgen.c @@ -392,6 +392,7 @@ static struct irq_chip wakeupgen_chip = { .irq_mask = wakeupgen_mask, .irq_unmask = wakeupgen_unmask, .irq_retrigger = irq_chip_retrigger_hierarchy, + .irq_set_type = irq_chip_set_type_parent, .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND, #ifdef CONFIG_SMP .irq_set_affinity = irq_chip_set_affinity_parent,