From patchwork Wed Sep 23 00:14:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gerlach X-Patchwork-Id: 7246661 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3C848BEEC1 for ; Wed, 23 Sep 2015 00:16:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2757E207E6 for ; Wed, 23 Sep 2015 00:16:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id F0477207BF for ; Wed, 23 Sep 2015 00:16:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935120AbbIWAQS (ORCPT ); Tue, 22 Sep 2015 20:16:18 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:57751 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934802AbbIWAQQ (ORCPT ); Tue, 22 Sep 2015 20:16:16 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id t8N0F3fT010879; Tue, 22 Sep 2015 19:15:03 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id t8N0F2AF001114; Tue, 22 Sep 2015 19:15:03 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.224.2; Tue, 22 Sep 2015 19:15:02 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t8N0F2DB005496; Tue, 22 Sep 2015 19:15:02 -0500 Received: from localhost (uda0274052.am.dhcp.ti.com [128.247.9.225]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id t8N0F2918283; Tue, 22 Sep 2015 19:15:02 -0500 (CDT) From: Dave Gerlach To: , , , CC: Jassi Brar , Suman Anna , Tony Lindgren , Santosh Shilimkar , Keerty J , Dave Gerlach Subject: [PATCH v3 1/3] mailbox/omap: Add ti, mbox-send-noirq quirk to fix AM33xx CPU Idle Date: Tue, 22 Sep 2015 19:14:52 -0500 Message-ID: <1442967294-23837-2-git-send-email-d-gerlach@ti.com> X-Mailer: git-send-email 2.4.6 In-Reply-To: <1442967294-23837-1-git-send-email-d-gerlach@ti.com> References: <1442967294-23837-1-git-send-email-d-gerlach@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The mailbox framework controls the transmission queue and requires either its controller implementations or clients to run the state machine for the Tx queue. The OMAP mailbox controller uses a Tx-ready interrupt as the equivalent of a Tx-done interrupt to run this Tx queue state-machine. The WkupM3 processor on AM33xx and AM43xx SoCs is used to offload certain PM tasks, like doing the necessary operations for Device PM suspend/resume or for entering lower c-states during cpuidle. The CPUIdle on AM33xx requires the messages to be sent without having to trigger the Tx-ready interrupts, as the interrupt would immediately terminate the CPUIdle operation. Support for this has been added by introducing a DT quirk, "ti,mbox-send-noirq" and using it to modify the normal OMAP mailbox controller behavior on the sub-mailboxes used to communicate with the WkupM3 remote processor. This also requires the wkup_m3_ipc driver to adjust its mailbox usage logic to run the Tx state machine. NOTE: - AM43xx does not communicate with WkupM3 for CPU Idle, so is not affected by this behavior. But, it uses the same IPC driver for PM suspend/resume functionality, so requires the quirk as well, because of changes to the common wkup_m3_ipc driver. Signed-off-by: Dave Gerlach [s-anna@ti.com: revise logic and update comments/patch description] Signed-off-by: Suman Anna --- v2->v3: Unchanged. .../devicetree/bindings/mailbox/omap-mailbox.txt | 8 ++++ drivers/mailbox/omap-mailbox.c | 49 ++++++++++++++++++++-- 2 files changed, 53 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt b/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt index d1a0433..9b40c49 100644 --- a/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt +++ b/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt @@ -75,6 +75,14 @@ data that represent the following: Cell #3 (usr_id) - mailbox user id for identifying the interrupt line associated with generating a tx/rx fifo interrupt. +Optional Properties: +-------------------- +- ti,mbox-send-noirq: Quirk flag to allow the client user of this sub-mailbox + to send messages without triggering a Tx ready interrupt, + and to control the Tx ticker. Should be used only on + sub-mailboxes used to communicate with WkupM3 remote + processor on AM33xx/AM43xx SoCs. + Mailbox Users: ============== A device needing to communicate with a target processor device should specify diff --git a/drivers/mailbox/omap-mailbox.c b/drivers/mailbox/omap-mailbox.c index a3dbfd9..b7f636f 100644 --- a/drivers/mailbox/omap-mailbox.c +++ b/drivers/mailbox/omap-mailbox.c @@ -38,6 +38,8 @@ #include #include +#include "mailbox.h" + #define MAILBOX_REVISION 0x000 #define MAILBOX_MESSAGE(m) (0x040 + 4 * (m)) #define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m)) @@ -106,6 +108,7 @@ struct omap_mbox_fifo_info { int rx_irq; const char *name; + bool send_no_irq; }; struct omap_mbox { @@ -119,6 +122,7 @@ struct omap_mbox { u32 ctx[OMAP4_MBOX_NR_REGS]; u32 intr_type; struct mbox_chan *chan; + bool send_no_irq; }; /* global variables for the mailbox devices */ @@ -418,6 +422,9 @@ static int omap_mbox_startup(struct omap_mbox *mbox) goto fail_request_irq; } + if (mbox->send_no_irq) + mbox->chan->txdone_method = TXDONE_BY_ACK; + _omap_mbox_enable_irq(mbox, IRQ_RX); return 0; @@ -586,13 +593,27 @@ static void omap_mbox_chan_shutdown(struct mbox_chan *chan) mutex_unlock(&mdev->cfg_lock); } -static int omap_mbox_chan_send_data(struct mbox_chan *chan, void *data) +static int omap_mbox_chan_send_noirq(struct omap_mbox *mbox, void *data) { - struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan); int ret = -EBUSY; - if (!mbox) - return -EINVAL; + if (!mbox_fifo_full(mbox)) { + _omap_mbox_enable_irq(mbox, IRQ_RX); + mbox_fifo_write(mbox, (mbox_msg_t)data); + ret = 0; + _omap_mbox_disable_irq(mbox, IRQ_RX); + + /* we must read and ack the interrupt directly from here */ + mbox_fifo_read(mbox); + ack_mbox_irq(mbox, IRQ_RX); + } + + return ret; +} + +static int omap_mbox_chan_send(struct omap_mbox *mbox, void *data) +{ + int ret = -EBUSY; if (!mbox_fifo_full(mbox)) { mbox_fifo_write(mbox, (mbox_msg_t)data); @@ -604,6 +625,22 @@ static int omap_mbox_chan_send_data(struct mbox_chan *chan, void *data) return ret; } +static int omap_mbox_chan_send_data(struct mbox_chan *chan, void *data) +{ + struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan); + int ret; + + if (!mbox) + return -EINVAL; + + if (mbox->send_no_irq) + ret = omap_mbox_chan_send_noirq(mbox, data); + else + ret = omap_mbox_chan_send(mbox, data); + + return ret; +} + static const struct mbox_chan_ops omap_mbox_chan_ops = { .startup = omap_mbox_chan_startup, .send_data = omap_mbox_chan_send_data, @@ -732,6 +769,9 @@ static int omap_mbox_probe(struct platform_device *pdev) finfo->rx_usr = tmp[2]; finfo->name = child->name; + + if (of_find_property(child, "ti,mbox-send-noirq", NULL)) + finfo->send_no_irq = true; } else { finfo->tx_id = info->tx_id; finfo->rx_id = info->rx_id; @@ -791,6 +831,7 @@ static int omap_mbox_probe(struct platform_device *pdev) fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, finfo->rx_usr); fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, finfo->rx_usr); + mbox->send_no_irq = finfo->send_no_irq; mbox->intr_type = intr_type; mbox->parent = mdev;